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DS30010118D-page 287

PIC24FJ256GA705 FAMILY

24.0 12-BIT A/D CONVERTER WITH

THRESHOLD DETECT

The A/D Converter has the following key features:

• Successive Approximation Register (SAR)

Conversion

• Selectable 10-Bit or 12-Bit (default) Conversion

Resolution

• Conversion Speeds of up to 200 ksps (12-bit)

• Up to 19 Analog Input Channels (internal and

external)

• Multiple Internal Reference Input Channels

• External Voltage Reference Input Pins

• Unipolar Differential Sample-and-Hold (S/H)

Amplifier

• Automated Threshold Scan and Compare

Operation to Pre-Evaluate Conversion Results

• Selectable Conversion Trigger Source

• Fixed Length (one word per channel),

Configurable Conversion Result Buffer

• Four Options for Results Alignment

• Configurable Interrupt Generation

• Enhanced DMA Operations with Indirect Address

Generation

• Operation During CPU Sleep and Idle modes

The 12-bit A/D Converter module is an enhanced

version of the 10-bit module offered in earlier PIC24

devices. It is a Successive Approximation Register

(SAR) Converter, enhanced with 12-bit resolution, a

wide range of automatic sampling options, tighter inte-

gration with other analog modules and a configurable

results buffer.

It also includes a unique Threshold Detect feature that

allows the module itself to make simple decisions

based on the conversion results, and enhanced opera-

tion with the DMA Controller through Peripheral Indirect

Addressing (PIA).

A simplified block diagram for the module is shown in

Figure 24-1.

24.1

Basic Operation

To perform a standard A/D conversion:

Configure the module:

a) Configure port pins as analog inputs by

setting the appropriate bits in the ANSx

registers (see Section 11.2 “Configuring

Analog Port Pins (ANSx)” for more

information).

b) Select the voltage reference source to

match the expected range on analog inputs

(AD1CON2<15:13>).

Select the positive and negative multiplexer

inputs for each channel (AD1CHS<15:0>).

Select the analog conversion clock to match

the desired data rate with the processor

clock (AD1CON3<7:0>).

e) Select the appropriate sample/conversion

sequence

(AD1CON1<7:4>

and

AD1CON3<12:8>).

For Channel A scanning operations, select

the positive channels to be included

(AD1CSSH and AD1CSSL registers).

g) Select

how

conversion

results

are

presented in the buffer (AD1CON1<9:8>

and AD1CON5 register).

h) Select the interrupt rate (AD1CON2<5:2>).

Turn on A/D module (AD1CON1<15>).

Configure the A/D interrupt (if required):

a) Clear the AD1IF bit (IFS0<13>).

b) Enable the AD1IE interrupt (IEC0<13>).

Select the A/D interrupt priority (IPC3<6:4>).

If the module is configured for manual sampling,

set the SAMP bit (AD1CON1<1>) to begin

sampling.

Note:

This data sheet summarizes the features

of this group of PIC24F devices. It is not

intended to be a comprehensive refer-

ence source. For more information on

the 12-Bit A/D Converter, refer to the

“dsPIC33/PIC24

Family

Reference

Manual”, “12-Bit A/D Converter with

Threshold Detect” (DS39739), which is

available from the Microchip website

(www.microchip.com). The information

in this data sheet supersedes the

information in the FRM.

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