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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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DVR 数据表(PDF) 301 Page - Microchip Technology |
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DVR 数据表(HTML) 301 Page - Microchip Technology |
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301 / 416 page  2016-2018 Microchip Technology Inc. DS30010118D-page 301 PIC24FJ256GA705 FAMILY REGISTER 24-7: ANCFG: A/D BAND GAP REFERENCE CONFIGURATION REGISTER U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 — — — — — VBGEN3(1) VBGEN2(1) VBGEN1(1) bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-3 Unimplemented: Read as ‘0’ bit 2 VBGEN3: A/D Band Gap Reference Enable bit(1) 1 = Band gap reference is enabled 0 = Band gap reference is disabled bit 1 VBGEN2: CTMU and Comparator Band Gap Reference Enable bit(1) 1 = Band gap reference is enabled 0 = Band gap reference is disabled bit 0 VBGEN1: VREG, BOR, HLVD, FRC, NVM and A/D Boost Band Gap Reference Enable bit(1) 1 = Band gap reference is enabled 0 = Band gap reference is disabled Note 1: When a module requests a band gap reference voltage, that reference will be enabled automatically after a brief start-up time. The user can manually enable the band gap references using the ANCFG register before enabling the module requesting the band gap reference to avoid this start-up time (~1 ms). |
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