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DVR 数据表(PDF) 325 Page - Microchip Technology |
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DVR 数据表(HTML) 325 Page - Microchip Technology |
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325 / 416 page  2016-2018 Microchip Technology Inc. DS30010118D-page 325 PIC24FJ256GA705 FAMILY REGISTER 27-3: CTMUCON2L: CTMU CONTROL REGISTER 2 LOW U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 U-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 — — —IRSTEN — DSCHS2 DSCHS1 DSCHS0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-5 Unimplemented: Read as ‘0’ bit 4 IRSTEN: CTMU Current Source Reset Enable bit 1 = Signal selected by DSCHS<2:0> bits or IDISSEN control bit will reset CTMU edge detect logic 0 = CTMU edge detect logic must be reset by software bit 3 Unimplemented: Read as ‘0’ bit 2-0 DSCHS<2:0>: Discharge Source Select Bits 111 = CLC2 out 110 = CLC1 out 101 = Disabled 100 = A/D end of conversion 011 = MCCP3 auxiliary output 010 = MCCP2 auxiliary output 001 = MCCP1 auxiliary output 000 = Disabled |
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