DVR datasheet(329/416 Pages) MICROCHIP

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DS30010118D-page 329

PIC24FJ256GA705 FAMILY

29.0 SPECIAL FEATURES

PIC24FJ256GA705 family devices include several

features intended to maximize application flexibility and

reliability, and minimize cost through elimination of

external components. These are:

• Flexible Configuration

• Watchdog Timer (WDT)

• Code Protection

• JTAG Boundary Scan Interface

• In-Circuit Serial Programming™

• In-Circuit Emulation

29.1

Configuration Bits

The Configuration bits are stored in the last page loca-

tion of implemented program memory. These bits can be

set or cleared to select various device configurations.

There are two types of Configuration bits: system oper-

ation bits and code-protect bits. The system operation

bits determine the power-on settings for system-level

components, such as the oscillator and the Watchdog

Timer. The code-protect bits prevent program memory

from being read and written.

29.1.1

CONSIDERATIONS FOR

CONFIGURING PIC24FJ256GA705

FAMILY DEVICES

In PIC24FJ256GA705 family devices, the Configuration

bytes are implemented as volatile memory. This means

that configuration data must be programmed each time

the device is powered up. Configuration data is stored in

the three words at the top of the on-chip program

memory space, known as the Flash Configuration

Words. Their specific locations are shown in Table 29-1.

The configuration data is automatically loaded from the

Flash Configuration Words to the proper Configuration

registers during device Resets.

When creating applications for these devices, users

should always specifically allocate the location of the

Flash Configuration Word for configuration data. This is

to make certain that program code is not stored in this

address when the code is compiled.

The upper byte of all Flash Configuration Words in

program memory should always be ‘0000 0000’. This

makes them appear to be NOP instructions in the

remote event that their locations are ever executed by

accident. Since Configuration bits are not implemented

in the corresponding locations, writing ‘0’s to these

locations has no effect on device operation.

TABLE 29-1:

CONFIGURATION WORD ADDRESSES

Note:

This data sheet summarizes the features of

this group of PIC24F devices. It is not

intended to be a comprehensive reference

source. For more information, refer to the

following sections of the “dsPIC33/PIC24

Family Reference Manual”, which are

available from the Microchip website

(www.microchip.com). The information

in this data sheet supersedes the

information in the FRM.

• “Watchdog Timer (WDT)”

(DS39697)

• “High-Level Device Integration”

(DS39719)

• “Programming and Diagnostics”

(DS39716)

Note:

Configuration data is reloaded on all types

of device Resets.

Configuration

PIC24FJ256GA70X

PIC24FJ128GA70X

PIC24FJ64GA70X

FSEC

02AF00h

015F00h

00AF00h

FBSLIM

02AF10h

015F10h

00AF10h

FSIGN

02AF14h

015F14h

00AF14h

FOSCSEL

02AF18h

015F18h

00AF18h

FOSC

02AF1Ch

015F1Ch

00AF1Ch

FWDT

02AF20h

015F20h

00AF20h

FPOR

02AF24h

015F24h

00AF24h

FICD

02AF28h

015F28h

00AF28h

FDEVOPT1

02AF2Ch

015F2Ch

00AF2Ch

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