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DVR 数据表(PDF) 331 Page - Microchip Technology |
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DVR 数据表(HTML) 331 Page - Microchip Technology |
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331 / 416 page ![]() 2016-2018 Microchip Technology Inc. DS30010118D-page 331 PIC24FJ256GA705 FAMILY REGISTER 29-2: FBSLIM CONFIGURATION REGISTER U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1 — — — — — — — — bit 23 bit 16 U-1 U-1 U-1 R/PO-1R/PO-1R/PO-1R/PO-1R/PO-1 — — — BSLIM<12:8> bit 15 bit 8 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 BSLIM<7:0> bit 7 bit 0 Legend: PO = Program Once bit R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 23-13 Unimplemented: Read as ‘1’ bit 12-0 BSLIM<12:0>: Active Boot Segment Code Flash Page Address Limit (Inverted) bits This bit field contains the last active Boot Segment Page + 1 (i.e., first page address of GS). The value is stored as an inverted page address, such that programming additional ‘0’s can only increase the size of BS. If BSLIM<12:0> is set to all ‘1’s (unprogrammed default), the active Boot Segment size is zero. |
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