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L9396 数据表(PDF) 72 Page - STMicroelectronics |
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L9396 数据表(HTML) 72 Page - STMicroelectronics |
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72 / 109 page ![]() System functional safety implementations L9396 72/109 DS12539 Rev 6 7.4.1 Watchdog (WD1) The device and the microcontroller exchange queries and answers on a defined timing base. An internal watchdog logic is implemented to inhibit load actuation such as to send reset signal, while it can disable directly these drivers through a second switch-off path: 1. Pump Motor Pre-Driver 2. GPO Driver 3. Fail Safe Pre Driver 4. VBAT Switch Figure 13. WD1 block diagram Two modes of timing checks are provided: Mono-directional: timing check based only on answers. Microcontroller must send queries (without timing window check) and answers on a defined time window; Bidirectional: timings are bidirectionally checked. L9396 must receive queries on a defined time window. Microcontroller must send answers on a defined time window. In case time windows are not respected an error is generated. Figure 14. Mono-directional timing check evolution SPI Watchdog Logic Fault Counter Logic Register Configuration GADG2401171253PS WD1_RESET (WD_CNT) T_Answ_TimeOut T_start_REQ T_Valid_Answ_Start T_Valid_Answ_End Request Answer T_Req _TimeOut T_Answ_TimeOut T_start_REQ T_Valid_Answ_Start T_Valid_Answ_End Answer ... GADG2401171309PS |
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