L9396 datasheet(39/109 Pages) STMICROELECTRONICS

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DS12539 Rev 6

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L9396

Pre-drivers

108

PRG pre-drivers remain disabled until the Enable Motor FET Driver SPI bit is re-set over

SPI. The PDG Turn-On/off Fault SPI bits are latched until read.

In case the negative flyback voltage on PDS drops below the open flyback voltage threshold

for longer than the open flyback debounce time after PDG is turned off, the device disables

both the PDG and PRG pre-drivers, sets the Open Flyback Fault SPI bit and clears the

Enable Motor FET Driver SPI bit. The PDG and PRG pre-drivers remain disabled until the

Enable Motor FET Driver SPI bit is re-set over SPI. The Open Flyback Fault SPI bit is

latched until read.

After PDG is turned on, the device monitors the falling differential voltage between PDBATT

and PDS. If the differential voltage does not drop below the QPD turn-on voltage threshold

within the QPD switching time, the device disables the PDG pre-driver and sets the QPD

Turn-On Fault SPI bit. The device automatically re-enables the PDG pre-driver on the next

rising PDI edge. The QPD Turn-On Fault SPI bit is latched until read.

After PDG is turned off, the device monitors the falling PDS voltage. If the voltage does not

drop below the QPD turn-off voltage threshold within the QPD switching time, the device

disables both the PDG and PRG pre-drivers, sets the QPD Turn-Off Fault SPI bit and clears

the Enable Motor FET Driver SPI bit. The PDG and PRG pre-drivers remain disabled until

the Enable Motor FET Driver SPI bit is re-set over SPI. The QPD Turn-Off Fault SPI bit is

latched until read.

After PRG is turned on, the device monitors the rising differential voltage between PRG and

PRS. If the differential voltage does not exceed the PRG turn-on voltage threshold within the

PRG switching time, the device sets the PRG Turn-On Fault SPI bit. The device continues

to drive the current limited PRG pin. The PRG Turn-On Fault SPI bit is latched until read.

After PRG is turned off, the device monitors the falling differential voltage between PRG and

PRS. If the differential voltage does not drop below the PRG turn-off voltage threshold within

the PRG switching time, the device disables both the PDG and PRG pre-drivers, sets the

PRG Turn-Off Fault SPI bit and clears the Enable Motor FET Driver SPI bit. The PDG and

PRG pre-drivers remain disabled until the Enable Motor FET Driver SPI bit is re-set over

SPI. The PRG Turn-On Fault SPI bit is latched until read.

All the OFF diagnostic comparators (PDG_OFF, open flyback, QPD_OFF, PRG_OFF) are

active during the entire OFF state until FETs are switched on. Output of comparators is

masked when Enable Motor FET Driver SPI bit is low while is not masked when Enable bit

is high and FETs are in off state. There is no masking of OFF diagnostic when there is

transition of Enable Motor FET Driver SPI bit from low to high. Masking time is only applied

during the transitions of FETs gate command.

In case of a device ground loss while the motor is enabled, the device disables both external

FETs. These FETs remain disabled until the device returns to the active mode.

If battery level goes below the disable voltage, the pre-driver is turned off after the delay

disable time has elapsed. When the level returns above the disable voltage, the pre-driver

returns to normal operation.

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