L9396 datasheet(73/109 Pages) STMICROELECTRONICS

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DS12539 Rev 6

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L9396

System functional safety implementations

108

Figure 15. Bidirectional timing check evolution

Both the request and the answer must be sent on a predefined timing interval.

When the microcontroller finishes its boot procedures, it will send the first seed sending

request to the device. In this moment all the timing counters will start and never stop.

In order to detect a fast event, such as two consequent SPI frames, the time base is based

on the WD frequency of 250 kHz, which is obtained from the device clock period (16 MHz).

The obtained clock period WD_CLK is 4 µs. The clock used for the timing windows is a

divided version of that in order to obtain a timing resolution of WD_CLK equal to 64 µs or

256 µs depending on the WD_CLK_DIV settings.

When the microcontroller sends the request of a new seed to the device (T_start_REQ) the

WD_REQ_TMR timer starts to count. The microcontroller must send a valid answer inside

the timing interval defined by the two SPI programmable parameters T_Valid_Answ_Start

and T_Valid_Answ_End. In case the microcontroller sends an answer before

T_Valid_Answ_Start or after T_Valid_Answ_End an error will be generated.

In case the WD_TO_RST_EN is set:

If no answer will arrive before T_Answ_TimeOut has elapsed, a WD1_RESET will be

generated and the flag WD_RST_ TO_Answ will be set.

When the microcontroller sends the answer to the device (T_start_ANSW) the

WD_ANSW_TMR timer starts to count. Microcontroller must send a new seed request

inside the timing interval defined by the two SPI programmable parameters

T_Valid_Req_Start and T_Valid_Req_End. In case the Micro sends the request before

T_Valid_Req_Start or after T_Valid_Req_End an error will be generated. If no request will

Table 53. Description of the timing parameter

Timing parameter

Description

T_start_REQ

Micro reads, through SPI register seed to be elaborated

T_Valid_Answ_Start

Starting time interval for Valid answers

T_Valid_Answ_End

Ending time interval for Valid answers

T_Answ_TimeOut

Time out for answer

T_start_ANSW

Micro sends, through SPI register answer to the IC

T_Valid_Req_Start

Starting time interval for next following request

T_Valid_Req_End

Ending time interval for next following request

T_Req_TimeOut

Time out for request

Answer

Request

Answer

Request

GADG2401171314PS

T_Valid_Answ_Start

T_start_REQ

T_Valid_Answ_End

T_Answ_TimeOut

T_start_ANSW

T_Valid_Req_End

T_Req_TimeOut

T_Valid_Req_Start

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