L9396 datasheet(27/109 Pages) STMICROELECTRONICS

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DS12539 Rev 6

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L9396

Power supply

108

3.7

VCORE regulator

This regulator provides the supply to the µC core. The flexible approach with the external

voltage divider allows the rail to be regulated from 0.8 V to 5 V. It can also be configured

either as a buck controller or as a linear controller, driving an external FET in both cases.

Figure 5. VCORE configuration diagram (buck regulator - top, linear regulator -

bottom)

Typically 2.2 Ω resistor is to be inserted between GCORE pin and gate of the external FET

for buck configuration. For buck configuration, the source of the external FET should be

connected to the SCORE pin, and the output tank capacitor should be connected to the

VCORE pin. For linear configuration, the output tank capacitor should be connected with the

source of the external FET and the SCORE pin, while VCORE pin could be left either

floating, tied to ground or still connected to VCORE to allow ADC internal measurement.

The VCORE regulator has over and under voltage detections and the VCORE is not shut

down in case of over or under voltage. It is also protected against short to ground by

monitoring regulation loop for VCORE buck or over current for VCORE linear. When short to

ground is detected and lasts more than the filter time of tflt_oc_vcore, the vcore is shut down

and the restart is automatic in tflt_restart. No thermal protection is implemented for VCORE

because the power MOS is external.

Both VPREREG and VCORE regulators could be disabled by connecting I_CORE_SH pin

to ground or leaving it open. In this case, VPREREG pin should be connected to VBST pin.

Moreover two pins (AI0 and AI1) are used to configure additional features of VCORE

regulator. It's possible to disable only VCORE regulator leaving VPREREG enabled. It's

possible to change the monitor of regulated voltage (monitor on VCORE pin or monitor on

VCOREFDBK pin). All the possibilities are listed in the following table.

Buck

Configuration

VCOREFDBK

GCORE

SCORE

VCORE

CBS

Linear

configuration

VCOREFDBK

GCORE

SCORE

VCORE

GADG1901171138PS

I_CORE_SL

I_CORE_SH

I_CORE_SL

I_CORE_SH

(w/ Stop Mode bypass

with ext. FET

LDO)

Volt. Mon.

22uH

VPREREG

L9396

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