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L9396 数据表(PDF) 28 Page - STMicroelectronics |
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L9396 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 109 page  Power supply L9396 28/109 DS12539 Rev 6 The state of configuration pins (AI0, AI1 and I_CORE_SH) is latched at power up when VPREREG voltage exceeds the VPREREG_UV threshold and stays latched until next POR event. Microcontroller can monitor the voltage of AI0 and AI1 pins using embedded ADC converter and latched configuration is available via SPI bits. All electrical characteristics are valid for the following conditions unless otherwise noted: -40 °C ≤ Tj ≤ +175 °C; VPREREG_L(Min) ≤ VPREREG ≤ VPREREG_H(Max). Table 11. Vcore configuration AI0 AI1 I_CORE_SH VCORE state VPREREG state VCORE monitor Low Low High Enabled Enabled VCORE_UV_L, VCORE_OV_L Low High High Enabled Enabled VCORE_UV_H, VCORE_OV_H High Low High Enabled Enabled VCOREFDBK_UV, VCOREFDBK_OV High High High Disabled Enabled Disabled Don’t care Don’t care Low Disabled Disabled Disabled Table 12. VCORE regulator electrical characteristics Symbol Parameter Conditions Min Typ Max Unit RSH_HI_CURR Shunt resistor high current - 99 100 101 mΩ RSH_LO_CURR Shunt resistor low current Only in linear mode 327 330 333 mΩ VCORE FDBK_RES Feedback resistor range - 10 - 100 kΩ VCOREFDBK_UV Undervoltage threshold Excluding external voltage divider accuracy VCOREFDBK – 10% - VCOREFDBK – 5% V VCOREFDBK_OV Overvoltage threshold Excluding external voltage divider accuracy VCOREFDBK + 5% - VCOREFDBK + 10% V VCORE_UV_L VCORE low Undervoltage threshold - 2.97 - 3.135 V VCORE_OV_L VCORE low Overvoltage threshold - 3.465 - 3.63 V VCORE_UV_H VCORE high Undervoltage threshold - 4.5 - 4.75 V |
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