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ES9218PC 数据表(PDF) 48 Page - ESS Technology,Inc |
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ES9218PC 数据表(HTML) 48 Page - ESS Technology,Inc |
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48 / 101 page ![]() ES9218P Datasheet December 6, 2018 CONFIDENTIAL ADVANCE INFORMATION 1.8 ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801 48 GPIO Modes The following table describes the supported values for gpio1_cfg or gpio2_cfg and their function. gpioX_cfg Name I/O Direction Details 4’d0 Automute Status Output Output is high when an automute has been triggered. This signal is analogous to Register 64 (Read-Only): Chip Status (0x40) automute_status. 4’d1 Lock Status Output Output is high when lock is triggered. This signal is analogous to Register 64 (Read-Only): Chip Status (0x40) lock_status. 4’d2 Volume Min Output Output is high when all digital volume controls have been ramped to minus full scale. This can occur, for example, if automute is enabled and set to mute the volume. 4’d3 CLK Output Output is a buffered CLK signal which can be used to synchronize other devices. 4’d4 Interrupt Output Output is high for a variety of interrupts: • Register 64 (Read-Only): Chip Status (0x40) lock_status or automute_status have changed. Clear by reading register 64. • Any bit in Register 65 (Read-Only): GPIO Readback (0x41) ocbr or ocbl has gone high. Clear by reading register 65. • Any bit in Register 72 (Read-Only): Input Selection and Automute Status (0x48) oc_sd_mute has gone high. Clear by disabling overcurrent protection with Register 11: Overcurrent Protection (0x0B) oc_sd_en. See Register 33: Interrupt Mask (0x21) for details on masking these interrupts. 4’d5 Reserved 4’d6 Reserved 4’d7 Output 1’b0 Output Output is forced low. 4’d8 Standard Input Input Places the GPIO into a high impedance state, allowing the customer to provide a digital signal and then read that signal back via the I2C from Register 65 (Read-Only): GPIO Readback (0x41). 4’d9 Input Select Input Places the GPIO into a high impedance state and allows the customer to toggle the input selection between two modes using either GPIO pin. See Register 21: GPIO Input Selection (0x15) for more information. 4’d10 Mute All Input Places the GPIO into a high impedance state. A mute condition can be forced by applying a logic high signal to the GPIO. The mute condition can be reset but applying a logic low signal to the GPIO. This will not reset mute conditions caused by an automute. 4’d11 Amp Mode Select Input Activates the amplifier mode set in Register 32: Amplifier Configuration (0x20) when the GPIO is pulled up. This option is only available for GPIO1. 4’d12 Reserved 4’d13 Shut Down Input Shutdown GPIO. 4’d14 Soft Start Complete Output Output is high when the DAC output is ramped to ground. The DAC can be ramped to ground via an automute condition when appropriately programmed (see Automute), or via Register 14: Soft Start Configuration (0x0E). 4’d15 Output 1’b1 Output Output is forced high. |
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