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ES9218PC 数据表(PDF) 66 Page - ESS Technology,Inc |
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ES9218PC 数据表(HTML) 66 Page - ESS Technology,Inc |
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66 / 101 page  ES9218P Datasheet December 6, 2018 CONFIDENTIAL ADVANCE INFORMATION 1.8 ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801 66 Register 33: Interrupt Mask (0x21) Bits [7] [6] [5] [4] [3] [2] [1] [0] Mnemonic ocr_sd_m ocl_sd_m ocr_pos_m ocl_pos_m ocr_neg_m ocr_neg_m automute_status_m lock_status_m Default 1’b0 1’b0 1’b1 1’b1 1’b1 1’b1 1’b0 1’b0 Bit Mnemonic Description [7] ocr_sd_m Interrupt mask for ocr_sd_mute Register 72 (Read-Only): Input Selection and Automute Status (0x48). • 1’b0: ocr_sd_mute bit will not flag an interrupt. (default) • 1’b1: ocr_sd_mute bit will flag an interrupt. Clear this interrupt by toggling overcurrent protection disabled-enabled with oc_sd_en Register 11: Overcurrent Protection (0x0B). [6] ocl_sd_m Interrupt mask for ocl_sd_mute Register 72 (Read-Only): Input Selection and Automute Status (0x48). • 1’b0: ocl_sd_mute bit will not flag an interrupt. (default) • 1’b1: ocl_sd_mute bit will flag an interrupt Clear this interrupt by toggling overcurrent protection disabled-enabled with oc_sd_en Register 11: Overcurrent Protection (0x0B). [5] ocr_pos_m Interrupt mask for ocbr_pos Register 65 (Read-Only): GPIO Readback (0x41). • 1’b0: ocbr_pos bit will not flag an interrupt • 1b’1: ocbr_pos bit will flag an interrupt (default) Clear this interrupt by reading Register 65 (Read-Only): GPIO Readback (0x41). [4] ocl_pos_m Interrupt mask for ocbl_pos Register 65 (Read-Only): GPIO Readback (0x41) • 1’b0: ocbl_pos bit will not flag an interrupt • 1b’1: ocbl_pos bit will flag an interrupt (default) Clear this interrupt by reading Register 65 (Read-Only): GPIO Readback (0x41). [3] ocr_neg_m Interrupt mask for ocbr_neg Register 65 (Read-Only): GPIO Readback (0x41). • 1’b0: ocbr_neg bit will not flag an interrupt • 1b’1: ocbr_neg bit will flag an interrupt (default) Clear this interrupt by reading Register 65 (Read-Only): GPIO Readback (0x41). [2] ocl_neg_m Interrupt mask for ocbl_neg Register 65 (Read-Only): GPIO Readback (0x41). • 1’b0: ocbl_neg bit will not flag an interrupt • 1b’1: ocbl_neg bit will flag an interrupt (default) Clear this interrupt by reading Register 65 (Read-Only): GPIO Readback (0x41). |
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