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ES9218PC 数据表(PDF) 13 Page - ESS Technology,Inc

部件名 ES9218PC
功能描述  32-bit Stereo Low Power DAC with Headphone Amplifier, Analog Volume Control, and Output Switch
PDF  101 Pages
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制造商  ESS [ESS Technology,Inc]
网页  http://www.esstech.com
标志 ESS - ESS Technology,Inc

ES9218PC 数据表(HTML) 13 Page - ESS Technology,Inc

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ES9218P Datasheet
CONFIDENTIAL ADVANCE INFORMATION 1.8
December 6, 2018
13
ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801
Functional Description – Digital Features
Digital Audio Path
DSD Decode
I2S/LJ
Decode
I2C Control
Interface
Channel
Mapping
Channel
Mapping
Volume
Control
&
Automute
8x
Oversampling
Filter
(Slow or Fast)
8x IIR Filter
(Slow or Fast)
ASRC to CLK
Domain
Noise Shaped
Modulators
THD
Compensation
DoP Decode
Figure 3 - Digital audio path
Soft Mute
When Mute is asserted the output signal will be ramped to the –
 level. When Mute is reset the attenuation level will ramp back up to the previous
level set by the volume control register. Asserting Mute will not change the value of the volume control register. The ramp rate is set by Register 6:
DoP and Volume Ramp Rate (0x06) according to the following relationship:
2vol_rate ∗ FS
512
dB/s
Mute can be triggered by any of the following settings:
GPIO. See Register 8: GPIO1-2 Configuration (0x08).
Explicit register setting. See Register 7: Filter Bandwidth and System Mute (0x07).
Automute. See Automute.
Automute
Automute must be enabled and configured using Register 2: Mixing, Serial Data and Automute Configuration (0x02). It is disabled by default.
Automute is triggered when any one of the following conditions are met:
Mode
Detection Condition
Time
PCM
Data is lower than automute_level for the
specified time
2096896 / (automute_time x 64 x fs)
DSD
Equal number of 1s and 0s in every 8 bits
of data
2096896 / (automute_time) x DATA_CLK)
Automute_time can be set using Register 4: Automute Time (0x04).
Automute_level can be set using Register 5: Automute Level (0x05).



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