STM32U545NET3QTR datasheet(44/283 Pages) STMICROELECTRONICS

44 / 283 page

Functional overview

STM32U545xx

44/283

DS14216 Rev 1

3.9.4

Reset mode

In order to improve the consumption under reset, the I/O state under and after reset is

“analog state” (the I/O Schmitt trigger is disabled). In addition, the internal reset pull-up is

deactivated when the reset source is internal.

3.9.5

VBAT operation

The VBAT pin allows the device VBAT domain to be powered from an external battery or

an external super-capacitor.

The VBAT pin supplies the RTC with LSE, anti-tamper detection (TAMP), backup registers

and 2-Kbyte backup SRAM. Eight anti-tamper detection pins are available in VBAT mode.

The VBAT operation is automatically activated when VDD is not present. An internal

VBAT battery charging circuit is embedded and can be activated when VDD is present.

Note:

When the microcontroller is supplied from VBAT, neither external interrupts nor RTC

alarm/events exit the microcontroller from the VBAT operation.

3.9.6

PWR TrustZone security

When the TrustZone security is activated by the TZEN option bit, the PWR is switched in

TrustZone security mode.

The PWR TrustZone security secures the following configuration:

•

low-power mode

•

WKUP (wake-up) pins

•

voltage detection and monitoring

•

VBAT mode

Some of the PWR configuration bits security is defined by the security of other peripherals:

•

The VOS (voltage scaling) configuration is secure when the system clock selection is

secure in RCC.

•

The I/O pull-up/pull-down in Standby mode configuration is secure when the

corresponding GPIO is secure.

3.10

Peripheral interconnect matrix

Several peripherals have direct connections between them, that allow autonomous

communication between them and support the saving of CPU resources (thus power supply

consumption). In addition, these hardware connections allow fast and predictable latency.

14. SPI reception and transmission are functional and autonomous in Stop mode, and generate a wake-up interrupt

on transfer events.

15. A/D conversion is functional and autonomous in Stop mode, and generates a wake-up interrupt on conversion events.

16. LPTIM is functional and autonomous in Stop mode, and generates a wake-up interrupt on events.

17. MDF and ADF are functional and autonomous in Stop mode, and generate a wake-up interrupt on events.

18. I/Os can be configured with internal pull-up, pull-down or floating in Stop 3 and Standby modes.

19. I/Os can be configured with internal pull-up, pull-down or floating in Shutdown mode but the configuration is lost when

exiting the Shutdown mode.

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