STM32U545NET3QTR datasheet(85/283 Pages) STMICROELECTRONICS

85 / 283 page

DS14216 Rev 1

85/283

STM32U545xx

Functional overview

•

Frame synchronization active level configurable (offset, bit length, level)

•

First active bit position in the slot is configurable

•

LSB first or MSB first for data transfer

•

Mute mode

•

Stereo/mono audio frame capability

•

Communication clock strobing edge configurable (SCK)

•

Error flags with associated interrupts if enabled respectively

–

Overrun and underrun detection

–

Anticipated frame synchronization signal detection in Slave mode

–

Late frame synchronization signal detection in Slave mode

–

Codec not ready for the AC’97 mode in reception

•

Interruption sources when enabled:

–Errors

–

FIFO requests

•

DMA interface with two dedicated channels to handle access to the dedicated

integrated FIFO of each SAI audio sub-block.

3.45

Secure digital input/output and MultiMediaCards interface

(SDMMC)

The SDMMC (SD/SDIO embedded MultiMediaCard e•MMC™ host interface) provides

an interface between the AHB bus and SD memory cards, SDIO cards and e•MMC devices.

The MultiMediaCard system specifications are available through the MultiMediaCard

association website at www.mmca.org, published by the MMCA technical committee.

SD memory card and SD I/O card system specifications are available through the SD card

Association website at www.sdcard.org.

Table 24. SAI implementation

SAI features(1)

1. X: supported

SAI1

I2S, LSB or MSB-justified, PCM/DSP, TDM, AC’97

Mute mode

Stereo/mono audio frame capability.

16 slots

Data size configurable: 8-, 10-, 16-, 20-, 24-, 32-bit

FIFO size

X (8 words)

SPDIF

PDM

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