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STM32U545NET3QTR 数据表(PDF) 1 Page - STMicroelectronics

部件名 STM32U545NET3QTR
功能描述  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto
PDF  283 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32U545NET3QTR 数据表(HTML) 1 Page - STMicroelectronics

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This is information on a product in full production.
February 2023
DS14216 Rev 1
1/283
STM32U545xx
Ultra-low-power Arm® Cortex®-M33 MCU+TrustZone®+FPU,
240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto
Datasheet
- production data
Features
Includes ST state-of-the-art patented
technology
Ultra-low-power with FlexPowerControl
• 1.71 V to 3.6 V power supply
• –40 °C to +85/125 °C temperature range
• Low-power background-autonomous mode
(LPBAM): autonomous peripherals with DMA,
functional down to Stop 2 mode
• VBAT mode: supply for RTC, 32 x 32-bit backup
registers and 2-Kbyte backup SRAM
• 90 nA Shutdown mode (23 wake-up pins)
• 200 nA Standby mode (23 wake-up pins)
• 370 nA Standby mode with RTC
• 1.4 μA Stop 3 mode with 16-Kbyte SRAM
• 2.2 µA Stop 3 mode with full SRAM
• 3.0 µA Stop 2 mode with 16-Kbyte SRAM
• 4.6 µA Stop 2 mode with full SRAM
• 16.3 μA/MHz Run mode @ 3.3 V
Core
• Arm® 32-bit Cortex®-M33 CPU with
TrustZone®, MPU, DSP, and FPU
ART Accelerator
• 8-Kbyte instruction cache allowing 0-wait-state
execution from flash and external memories:
up to 160 MHz, 240 DMIPS
• 4-Kbyte data cache for external memories
Power management
• Embedded regulator (LDO) and SMPS
step-down converter supporting switch
on-the-fly and voltage scaling
Benchmarks
• 1.5 DMIPS/MHz (Drystone 2.1)
• 651 CoreMark® (4.07 CoreMark®/MHz)
• 464 ULPMark™-CP
• 125 ULPMark™-PP
• 54 ULPMark™-CM
• 137000 SecureMark™-TLS
Memories
• 512-Kbyte flash memory with ECC, 2 banks
read-while-write, and 100 kcycles
• 274-Kbyte SRAM including up to 64-Kbyte
SRAM with ECC ON
• 1 Octo-SPI memory interface
Security and cryptography
• PSA level 3 and SESIP level 3 certified
• Arm® TrustZone® and securable I/Os,
memories and peripherals
• Flexible life cycle scheme with RDP and
password protected debug
• Root of trust thanks to unique boot entry and
secure hide protection area (HDP)
• Secure firmware installation (SFI) thanks to
embedded root-secure services (RSS)
• Secure data storage with hardware-unique key
(HUK)
• Secure firmware upgrade support with TF-M
• 2 AES coprocessors including one with
DPA resistance
• Public key accelerator, DPA resistant
• On-the-fly decryption of Octo-SPI external
memories
• HASH hardware accelerator
LQFP48 (7 x 7 mm)
LQFP64 (10 x 10 mm)
LQFP100 (14 x 14 mm)
UFQFPN48
(7 x 7 mm)
WLCSP56
(3.38 x 3.38 mm)
WLCSP72
(3.38 x 3.38 mm)
UFBGA64
(5 x 5 mm)
UFBGA100
(7 x 7 mm)
www.st.com


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