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STM32U545NET3QTR 数据表(PDF) 33 Page - STMicroelectronics |
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STM32U545NET3QTR 数据表(HTML) 33 Page - STMicroelectronics |
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33 / 283 page ![]() DS14216 Rev 1 33/283 STM32U545xx Functional overview 88 –VREF+ around 2.048 V. This requires VDDA ≥ 2.4 V. –VREF+ around 2.5 V. This requires VDDA ≥ 2.8 V. VREF- and VREF+ pins are not available on all packages. When not available, they are bonded to VSSA and VDDA, respectively. When the VREF+ is double-bonded with VDDA in a package, the internal voltage reference buffer is not available and must be kept disabled. VREF- must always be equal to VSSA. The STM32U545xx devices embed two regulators: one LDO and one SMPS in parallel to provide the VCORE supply for digital peripherals, SRAM1, SRAM2, and SRAM4 and embedded flash memory. The SMPS generates this voltage on VDD11 (two pins), with a total external capacitor of 4.7 μF typical. SMPS requires an external coil of 2.2 μH typical. The LDO generates this voltage on VCAP pin connected to an external capacitor of 4.7 μF typical. Both regulators can provide four different voltages (voltage scaling) and can operate in Stop modes. It is possible to switch from SMPS to LDO and from LDO to SMPS on-the-fly. Figure 2. STM32U545xxxxQ power supply overview (with SMPS) MSv70511V2 USB transceiver Core SRAM1 SRAM2 SRAM4 Digital peripherals LSE crystal 32 kHz oscillator LSI 32 kHz oscillator Backup registers RCC_BDCR and PWR_BDCR1 registers RTC TAMP BKPSRAM VDDA domain Backup domain Standby circuitry (Wakeup logic, IWDG) LDO regulator Low-voltage detector I/O ring VCORE domain Flash memory VDDUSB VDDIO2 VDDIO1 I/O ring PG[15:2] VDDIO2 VDDA VSSA VSS VSS VDDIO2 domain VDD domain VCORE VSS VDD VBAT 2x VDD11 SMPS regulator Voltage regulator VLXSMPS VDDSMPS VSSSMPS A/D converters Comparators D/A converters Operational amplifiers Voltage reference buffer Temperature sensor Reset block 3 x PLL Internal RC oscillators |
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