BLUENRG-332VC datasheet(11/67 Pages) STMICROELECTRONICS

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Figure 5. Power supply domain overview

SMPS

MLDO

LP-Reg

CPU

RF_FSM

BLE

Peripherals

RCCi

Interruptible domain

(VDD12I)

HSI,

BLE_wakeup,

RTC

Watchdog,

LPUART

PWRCo,

RCCo

Always on

Domain

(VDD12O)

HSE, LSI, LSE

BOR, POR, PVD

PWRC33,

RCC33

V33 domain

(VDDIO)

VDDIO

CMDNO

CMDNI

VREG PAD

VFBSD

VGATEN

VGATEP

VDD12O

RFLDOs

Analog

VRF

VDD12I

2.6.3

Linear voltage regulators

The digital power supplies are provided by different regulators:

•

The main LDO (MLDO):

–

it provides 1.2 V from a 1.4-3.3 V input voltage

–

it supplies both VDD12i and VDD12o when the device is active

–

it is disabled during the low power mode (DEEPSTOP)

•

Low power LDO (LPREG):

–

it stays enabled during both active and low power phases

–

it provides 1.0 V voltage

–

it is not connected to the digital domain when the device is active

–

it is connected to the VDD12o domain during low power mode (DEEPSTOP)

•

A dedicated LDO (RFLDO) to provide a 1.2 V to the analog RF block

An embedded SMPS step-down converter is available (inserted between the external power and the LDOs).

2.6.4

Power supply supervisor

The BlueNRG-LPS device embeds several power voltage monitoring:

•

Power-on-reset (POR): during the power-on, the device remains in reset mode if VDDIO is below a VPOR

threshold (typically 1.65 V)

•

Power-down-reset (PDR): during power-down, the PDR puts the device under reset when the supply

voltage (VDD) drops below the VPDR threshold (around 20 mV below VPOR). The PDR feature is always

enabled

•

Power voltage detector (PVD): can be used to monitor the VDDIO (against a programmed threshold) or

an external analog input signal. When the feature is enabled and the PVD measures a voltage below the

comparator, an interrupt is generated (if unmasked)

BlueNRG-LPS

Power supply management

DS13819 - Rev 4

page 11/67

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