BLUENRG-332VC datasheet(13/67 Pages) STMICROELECTRONICS

13 / 67 page

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The I/Os pull-up and pull-down can be controlled during DEEPSTOP mode, depending on the software

configuration

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The low speed clock can be running or stopped, depending on the software configuration:

–

ON or OFF

–

Sourced by LSE or by LSI

•

The RTC, IWDG and LPUART stay active, if enabled and the low speed clock is ON

•

The radio wake-up block, including its timer, stay active (if enabled and the low speed clock is ON)

•

Up to 20 GPIOs retaining their configuration:

–

I/Os retain the RUN mode configuration while in DEEPSTOP mode

•

Up to 20 I/Os are able to be in output driving:

–

A static low or high level

•

Some I/Os are able to be in output driving:

–

The low speed clock (on PA10)

–

The RTC output (on PA8)

Possible wake-up sources are:

•

The radio block is able to generate two events to wake up the system through its embedded wake-up timer

running on low speed clock:

–

Radio wake-up time is reached

–

CPU host wake-up time is reached

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The RTC can generate a wake-up event

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The IWDG can generate a reset event

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The LPUART is able to generate a wake-up event

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All GPIOs are able to wake up the system

At wake-up, all the hardware resources located in the digital power domain that are OFF during the DEEPSTOP

mode, are reset. The CPU reboots. The wake-up reason is visible in the register of the power controller.

BlueNRG-LPS

Operating modes

DS13819 - Rev 4

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