数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

ADN2817 数据表(PDF) 5 Page - Analog Devices

部件名 ADN2817
功能描述  Continuous Rate 12.3Mb/s to 2.7Gb/s Clock and Data Recovery ICs
PDF  35 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADN2817 数据表(HTML) 5 Page - Analog Devices

  ADN2817 Datasheet HTML 1Page - Analog Devices ADN2817 Datasheet HTML 2Page - Analog Devices ADN2817 Datasheet HTML 3Page - Analog Devices ADN2817 Datasheet HTML 4Page - Analog Devices ADN2817 Datasheet HTML 5Page - Analog Devices ADN2817 Datasheet HTML 6Page - Analog Devices ADN2817 Datasheet HTML 7Page - Analog Devices ADN2817 Datasheet HTML 8Page - Analog Devices ADN2817 Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 35 page
background image
Preliminary Technical Data
ADN2817/ADN2818
Rev.Pr A | Page 5 of 35
OUTPUT AND TIMING SPECIFICATIONS
Table 3.
Parameter
Conditions
Min
Typ
Max
Unit
CML OUPUT CHARACTERISTICS
(CLKOUTP/N, DATAOUTP/N)
Single-Ended Output Swing
VSE (see Figure 3)
300
350
600
mV
Differential Output Swing
VDIFF (see Figure 3)
600
700
1200
mV
Output High Voltage
VOH
VCC
V
Output Low Voltage
VOL
VCC − 0.6
VCC − 0.35
VCC − 0.3
V
CML Ouputs Timing
Rise Time
20% to 80%
TBD
ps
Fall Time
80% to 20%
TBD
ps
Setup Time
TS (see Figure 2), OC-48
150
200
250
ps
Hold Time
TH (see Figure 2), OC-48
150
200
250
ps
I2C INTERFACE DC CHARACTERISTICS
LVCMOS
Input High Voltage
VIH
0.7 VCC
V
Input Low Voltage
VIL
0.3 VCC
V
Input Current
VIN = 0.1 VCC or VIN = 0.9 VCC
−10.0
+10.0
μA
Output Low Voltage
VOL, IOL = 3.0 mA
0.4
V
I2C INTERFACE TIMING
(See Figure 11)
SCK Clock Frequency
400
kHz
SCK Pulse Width High
tHIGH
600
ns
SCK Pulse Width Low
tLOW
1300
ns
Start Condition Hold Time
tHD;STA
600
ns
Start Condition Setup Time
tSU;STA
600
ns
Data Setup Time
tSU;DAT
100
ns
Data Hold Time
tHD;DAT
300
ns
SCK/SDA Rise/Fall Time
TR/TF
20 + 0.1 Cb1
300
ns
Stop Condition Setup Time
tSU;STO
600
ns
Bus Free Time between a Stop and a Start
tBUF
1300
ns
REFCLK CHARACTERISTICS
Optional lock to REFCLK mode
Input Voltage Range
@ REFCLKP or REFCLKN
VIL
0
V
VIH
VCC
V
Minimum Differential Input Drive
100
mV p-p
Reference Frequency
12.3
200
MHz
Required Accuracy
100
ppm
LVTTL DC INPUT CHARACTERISTICS
Input High Voltage
VIH
2.0
V
Input Low Voltage
VIL
0.8
V
Input High Current
IIH, VIN = 2.4 V
5
μA
Input Low Current
IIL, VIN = 0.4 V
−5
μA
LVTTL DC OUTPUT CHARACTERISTICS
Output High Voltage
VOH, IOH = −2.0 mA
2.4
V
Output Low Voltage
VOL, IOL = 2.0 mA
0.4
V
1 Cb = total capacitance of one bus line in pF. If mixed with Hs-mode devices, faster fall-times are allowed (see Table 6).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com