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4LS 数据表(PDF) 30 Page - ams AG |
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4LS 数据表(HTML) 30 Page - ams AG |
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30 / 115 page  Document Feedback 4LS Functional Description Datasheet • PUBLIC DS000542 • v3-01 • 2022-Nov-17 114 │ 29 7.4 Readout Cycle The pixel level ADC signal is stored in an SRAM bench, the digital readout is triggered by the external signal “Start_Readout”. This signal must be sent after the end of A/D conversion, based on the end of range value. When the sensor receives the signal (rising edge), the readout is started from the most left pixel to the right. An LVAL signal (at Start_Readout falling edge) is generated to indicate valid pixel data. Optionally the start of A/D conversion and start of readout can be triggered automatically from the on chip state machine. This feature can be enabled over a register bit. 7.4.1 Tap Organization The following figure presents the pixel distribution to three 2K5 segments over different output taps. The tap identification is performed as Tap WXLYZ, where W stands for the each 2K5 segment ID, starting on A as the first and moving on the alphabet for the remaining ones. X stands for each 2K5 segment pixel pair that is read, starting on 1 for the very left (and ending on 4, depending on the readout mode) . L stands for Line, where Y identifies the line number. Finally, Z identifies the line’s segment position, being B (Bottom) or T (Top). Each segment has 18 LVDS channels: 16 for Data (8 top and 8 bottom (4 each line)) and 2 optional for DataClk (1 top and 1 bottom). A 15K sensor, will have a total of 108 LVDS channels available. Depending on the target system, if the user wants to use a 15K sensor with a lower speed, a different readout mode can be chosen: 2-To-1 or 4-To-1, using less LVDS channels (Section 7.10). Figure 38: LVDS Outputs Organization on the First Three 4LS15K Segments 1 2 3 4 ... 13 14 15 16 17 18 19 20 2573 2574 2575 2576 2577 2578 Line 2 - Top Line 1 - Top Line 1 - Bottom Line 2 - Bottom 2579 2580 ... 5149 5150 5151 5152 5153 5154 5155 5156 ... 7725 7726 7727 7728 ... 1 2 3 4 ... 13 14 15 16 17 18 19 20 2573 2574 2575 2576 2577 2578 2579 2580 ... 5149 5150 5151 5152 5153 5154 5155 5156 ... 7725 7726 7727 7728 ... 1 2 3 4 ... 13 14 15 16 17 18 19 20 2573 2574 2575 2576 2577 2578 2579 2580 ... 5149 5150 5151 5152 5153 5154 5155 5156 ... 7725 7726 7727 7728 ... Tap A1L2T Tap A2L2T Tap A3L2T Tap A4L2T Tap A1L1T Tap A2L1T Tap A3L1T Tap A4L1T Tap B1L2T Tap B2L2T Tap B3L2T Tap B4L2T Tap B1L1T Tap B2L1T Tap B3L1T Tap B4L1T Tap C1L2T Tap C2L2T Tap C3L2T Tap C4L2T Tap C1L1T Tap C2L1T Tap C3L1T Tap C4L1T Tap A1L1B Tap A2L1B Tap A3L1B Tap A4L1B Tap B1L1B Tap B2L1B Tap B3L1B Tap B4L1B Tap C1L1B Tap C2L1B Tap C3L1B Tap C4L1B 1 2 3 4 ... 13 14 15 16 17 18 19 20 2573 2574 2575 2576 2577 2578 2579 2580 ... 5149 5150 5151 5152 5153 5154 5155 5156 ... 7725 7726 7727 7728 ... Tap A1L2B Tap A2L2B Tap A3L2B Tap A4L2B Tap B1L2B Tap B2L2B Tap B3L2B Tap B4L2B Tap C1L2B Tap C2L2B Tap C3L2B Tap C4L2B ... ... ... ... |
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