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4LS 数据表(PDF) 31 Page - ams AG |
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4LS 数据表(HTML) 31 Page - ams AG |
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31 / 115 page ![]() Document Feedback 4LS Functional Description Datasheet • PUBLIC DS000542 • v3-01 • 2022-Nov-17 114 │ 30 7.5 Automatic Start A/D Conversion and Readout The sensor features the possibility for the user to place it in semi-automatic mode. In this operation mode the user only needs to act over the reset signal for CDS and CVC, and the SAMPLE signal. The start of A/D conversion and the start for the readout will be performed automatically and the data will be sent to the user with no need for any additional action. To set the sensor to this operation mode it is necessary to set the bits 4 and 5 of register Status 2 to '1'. It is also possible to set only one of the operations to automatic. As an example, the start of readout can be set to automatic and the conversion set to manual, so the user needs to start the conversion by the START_AD signal, and, as soon the conversion is over, the sensor will start the readout automatically. Also if only the A/D conversion is set to be performed automatically, the sensor will start it as soon as the integration and the readout of previous line is finished, then it is the user’s responsibility to trigger the readout by the START_READOUT signal of the converted line. Despite the fact that these features are available and working, it is recommended to use perform the A/D conversion and readout using external signals, once these were applied for the sensor characterization phase and currently used in the Evaluation Kit (EK) system. For more details, regarding implementation, please refer to section 7.11. 7.6 LVDS Output Data Interface The data of each segment is communicated off chip via a serial LVDS interface. The LVDS output data interfaces are organized in 16 LVDS data outputs, 4 on each line, on top and on bottom. In addition to the data interface, there are 2 LVDS data clock interface, for deserialization purposes: one on top and another on bottom. The LVDS output current can be programmable over the SPI interface (register Programmable LVDS register, LVDS bias[4:2]) to grant a safe detection and deserialization. This feature permits to program the current from 400 µA to 2.8 mA with steps of 400 µA. This driving current can be reduced (decreasing the noise coupling to the analogue electronics) or increased based on voltage swing LVDS receiver. Additional, if needed, can also be switched off, drivers setting the configuration bits at '000'. A schematic, presenting the principle used of the LVDS transmitter, is presented on Figure 39. |
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