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4LS 数据表(PDF) 47 Page - ams AG |
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4LS 数据表(HTML) 47 Page - ams AG |
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47 / 115 page ![]() Document Feedback 4LS Functional Description Datasheet • PUBLIC DS000542 • v3-01 • 2022-Nov-17 114 │ 46 Parameters Clocks SAMPLE 80 START_AD 2 TBTW_START_AD&RST_RAMP 1 TBTW_SAMPLE&START_AD 12 FCT 375 MTA => Line Rate 670 => 119.4 kHz DTI 670 – 558 = 112 Max Integration Time(1) 558 => 6.975 µs Minimum LVALLow_Period 26 (1) To use the sensor at the maximum line rate, this is the maximum integration time possible. When it comes to the minimum integration time, in theory, it is possible to use a lower integration time, but it was not tested on this configuration. From an application perspective, using a lower integration time, does not bring significant advantages, once the line rate cannot be higher and the system would need to increase the illumination power. The minimum LVAL time at low between two consecutive data streams is: ������������������������������������������_������������������������������������ = 670 − 644 = 26 ������������������������������������ Figure 67: 8-Bit Timing Clocks for Readout Mode 2-To-1 Parameters Clocks Readout Data 1288 Readout Time 1318 FCT 375 MTA => Line Rate 1318 => 60.7 kHz DTI 112 Max Integration Time 1206 => 15.075 µs Minimum LVALLow_Period 30 Figure 68: 8-Bit Timing Clocks for Readout Mode 4-To-1 Parameters Clocks Readout Data 2576 Readout Time 2614 FCT 375 MTA => Line Rate 2614 => 30.6 kHz DTI 112 Max Integration Time 2502 => 31.275 µs |
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