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4LS

Digital Interface

Datasheet

• PUBLIC

DS000542

• v3-01 • 2022-Nov-17

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│ 54

Digital Interface

The sensor features two different types of control interfaces: SPI interface (using on chip registers)

and digital control lines.

8.1

Digital Control Lines

The digital control lines allows a dynamic control that grant maximum flexibility for readout control

operations, CVC control, CDS control and test control signals. Most of these signals changes the logic

state during pixel integration, A/D conversion and readout that cannot be done using static

configuration, due to read and write operation times.

Figure 78 lists all the digital signals used as digital control lines on each 2K5 segment on top and

bottom.

Figure 78:

Digital Control Lines

Signal

Function

Ext Sync

By configuration, the serializer can be set to synchronize phase to the rising edge of this signal

LVAL

When at high informs that the line data is valid

N RST Logic

Low active reset for sensor logic

N RST PLL

Low active reset for PLL logic

RST CVC L1

Reset signal to CVC block with respect to Line 1

RST CDS L1

Reset signal to CDS block with respect to Line 1

Sample L1

Performs the signal sampling at the ADC input with respect to Line 1

RST CVC L2

Reset signal to CVC block with respect to Line 2

RST CDS L2

Reset signal to CDS block with respect to Line 2

Sample L2

Performs the signal sampling at the ADC input with respect to Line 2

Start A/D conversion

Starts the A/D conversion for the last integrated line

Start readout

Starts the readout of last converted line

8.2

SPI Interface

8.2.1

General Description

The SPI interface controls static configuration data, such as operation modes, ADC gain, black level,

bias currents, etc. It is present in every segment, top and bottom sides. This interface is based on 8-bit

registers and addressed using 8-bit addresses.

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