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4LS 数据表(PDF) 32 Page - ams AG |
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4LS 数据表(HTML) 32 Page - ams AG |
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32 / 115 page  Document Feedback 4LS Functional Description Datasheet • PUBLIC DS000542 • v3-01 • 2022-Nov-17 114 │ 31 Figure 39: Principle of LVDS Current Steering Interface The following table shows the LVDS parameters. These parameters were designed and simulated using a 10 pF load and 100 Ω termination. Figure 40: LVDS Parameters Description Min Typ Max Units Differential Propagation Delay Low-to-High, tPLHD 150 320 ps Differential Propagation Delay High-to-Low, tPHLD 150 320 ps Differential Output Rise Time (20% to 80%), tTLHD 250 400 ps Differential Output Fall Time (80% to 20%), tTHLD 250 400 ps Pulse Skew, tSK(P) 400 ps 7.7 Transmission Mode The chip has the capability of increasing the output line rate by reducing the transmitted serial word length by configuring the bit-3 of register 0x02. In Out R Receiver |
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