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AD9923ABBCZ 数据表(PDF) 5 Page - Analog Devices

部件名 AD9923ABBCZ
功能描述  CCD Signal Processor with V-Driver and Precision Timing??Generator
PDF  88 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9923ABBCZ 数据表(HTML) 5 Page - Analog Devices

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AD9923A
Rev. 0 | Page 5 of 88
Parameter
Conditions/Comments
Symbol
Min
Typ
Max
Unit
VMM to VH
tPMH
25
ns
VH to VMM
tPHM
30
ns
VMM to VLL
tPML
25
ns
Rise Time
VLL to VH
tRLH
40
ns
VLL to VMM
tRLM
45
ns
VMM to VH
tRMH
30
ns
Fall Time
VH to VLL
tFHL
40
ns
VH to VMM
tFHM
90
ns
VMM to VLL
tFML
25
ns
Output Currents
@ −7.25 V
20
mA
@ −0.25 V
12
mA
@ +0.25 V
12
mA
@ +14.75 V
20
mA
RON
35
Ω
V-DRIVER
INPUT
tRLM, tRMH, tRLH
50%
10%
90%
tPLM, tPMH, tPLH
V-DRIVER
OUTPUT
10%
50%
90%
tFML, tFHM, tFHL
tPML, tPHM, tPHL
Figure 2. Definition of V-Driver Timing Specifications
ANALOG SPECIFICATIONS
AVDD = 3.0 V, fCLI = 36 MHz, typical timing specifications, TMIN to TMAX, unless otherwise noted.
Table 5.
Parameter
Conditions/Comments
Min
Typ
Max
Unit
CDS
Input characteristics definition1
Allowable CCD Reset Transient
0.5
1.2
V
CDS Gain Accuracy
VGA gain = 6 dB (Code 15, default value)
−3 dB CDS Gain
−3
−2.5
−2
dB
0 dB CDS Gain
Default
0
+0.5
+1
dB
+3 dB CDS Gain
+3
+3.5
+4
dB
+6 dB CDS Gain
+5.5
+6
+6.5
dB
Maximum Input Range Before Saturation
0 dB CDS Gain
Default setting
1.0
V p-p
−3 dB CDS Gain
1.4
V p-p
+6 dB CDS Gain
0.5
V p-p
Maximum CCD Black Pixel Amplitude
Positive offset definition1
0 dB CDS Gain (Default)
−100
+200
mV
+6 dB CDS Gain
−50
+100
mV
VARIABLE GAIN AMPLIFIER (VGA)
Gain Control Resolution
1024
Steps
Gain Monotonicity
Guaranteed
Gain Range
Minimum Gain (VGA Code 15)
6
dB
Maximum Gain (VGA Code 1023)
42
dB



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