数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

AD9923ABBCZ 数据表(PDF) 73 Page - Analog Devices

部件名 AD9923ABBCZ
功能描述  CCD Signal Processor with V-Driver and Precision Timing??Generator
PDF  88 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9923ABBCZ 数据表(HTML) 73 Page - Analog Devices

Back Button AD9923ABBCZ Datasheet HTML 69Page - Analog Devices AD9923ABBCZ Datasheet HTML 70Page - Analog Devices AD9923ABBCZ Datasheet HTML 71Page - Analog Devices AD9923ABBCZ Datasheet HTML 72Page - Analog Devices AD9923ABBCZ Datasheet HTML 73Page - Analog Devices AD9923ABBCZ Datasheet HTML 74Page - Analog Devices AD9923ABBCZ Datasheet HTML 75Page - Analog Devices AD9923ABBCZ Datasheet HTML 76Page - Analog Devices AD9923ABBCZ Datasheet HTML 77Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 73 / 88 page
background image
AD9923A
Rev. 0 | Page 73 of 88
Address
(Hex)
Data
Bits
Default
Value
Update
Type
Name
Description
[7:4]
1
H2DRV
H2 drive strength.
[11:8]
1
H3DRV
H3 drive strength.
[15:12]
1
H4DRV
H4 drive strength.
[19:16]
1
HLDRV
HL drive strength.
[23:20]
1
RGDRV
RG drive strength.
37
[5:0]
24
SCK
SHPLOC
SHP sample location.
[13:8]
0
SHDLOC
SHD sample location.
38
[5:0]
0
SCK
DOUTPHASE
DOUT (internal signal) phase control.
[7:6]
0
Unused
Must be set to 0.
[8]
0
DCLKMODE
DCLK mode.,
0: DCLK tracks DOUT phase.
1: DCLK phase is fixed.
[10:9]
2
DOUTDELAY
Data output delay (tOD) with respect to DCLK rising edge.
0: no delay.
1: ~4 ns.
2: ~8 ns.
3: ~12 ns.
[11]
0
DCLKINV
Invert DCLK output.
0: no inversion.
1: inversion of DCLK.
Table 49. CLPOB and PBLK Masking Registers
Address
(Hex)
Data
Bits
Default Value
Update
Type
Name
Description
40
[11:0]
FFF
VD
CLPOBMASKSTART1
CLPOB Masking Start Line 1.
[12]
0
Unused
Must be set to 0.
[24:13]
FFF
CLPOBMASKEND1
CLPOB Masking End Line 1.
41
[11:0]
FFF
VD
CLPOBMASKSTART2
CLPOB Masking Start Line 2.
[12]
0
Unused
Must be set to 0.
[24:13]
FFF
CLPOBMASKEND2
CLPOB Masking End Line 2.
42
[11:0]
FFF
VD
CLPOBMASKSTART3
CLPOB Masking Start Line 3.
[12]
0
Unused
Must be set to 0.
[24:13]
FFF
CLPOBMASKEND3
CLPOB Masking End Line 3.
43
[11:0]
FFF
VD
PBLKMASKSTART1
PBLK Masking Start Line 1.
[12]
0
Unused
Must be set to 0.
[24:13]
FFF
PBLKMASKEND1
PBLK Masking End Line 1.
44
[11:0]
FFF
VD
PBLKMASKSTART12
PBLK Masking Start Line 2.
[12]
0
Unused
Must be set to 0.
[24:13]
FFF
PBLKMASKEND2
PBLK Masking End Line 2.
45
[11:0]
FFF
VD
PBLKMASKSTART3
PBLK Masking Start Line 3.
[12]
0
Unused
Must be set to 0.
[24:13]
FFF
PBLKMASKEND3
PBLK Masking End Line 3.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com