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MASTERGAN1 数据表(PDF) 8 Page - STMicroelectronics |
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MASTERGAN1 数据表(HTML) 8 Page - STMicroelectronics |
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8 / 27 page ![]() Symbol Parameter Test condition Min Typ Max Unit VCC – BOOT = 0.5 V RONH High side turn on resistor I(GH) = 1 mA (source) 50 Ω ROFFH High side turn off resistor I(GH) = 1 mA (sink) 2 Ω Logic inputs Vil LIN, HIN, SD/OD Low level logic threshold voltage TJ = 25°C 1.1 1.31 1.45 V Full Temperature range(4) 0.8 Vih High level logic threshold voltage TJ = 25°C 2 2.17 2.5 V Full Temperature range(4) 2.7 Vihys Logic input threshold hysteresis 0.7 0.96 1.2 V IINh LIN, HIN Logic ‘1’ input bias current LIN, HIN = 5 V 23 33 55 μA IINl Logic ‘0’ input bias current LIN, HIN = GND 1 μA RPD_IN Input pull-down resistor LIN, HIN = 5 V 90 150 220 kΩ ISDh SD/OD Logic “1” input bias current SD/OD = 5 V 11 15 20 μA ISDl SD/OD Logic “0” input bias current SD/OD = 0 V 1 μA RPD_SD SD/OD Pull-down resistor SD/OD = 5 V OpenDrain OFF 250 330 450 kΩ VTSD SD/OD Thermal shutdown unlatch threshold TJ = 25°C(5) 0.5 0.75 1 V RON_OD SD/OD Open drain ON resistance TJ = 25°C; IOD = 400 mV(5) 8 10 18 Ω IOL_OD SD/OD Open Drain low level sink current TJ = 25°C; VOD = 400 mV(5) 22 40 50 mA Over temperature protection TTSD Shutdown temperature (4) 175 °C THYS Temperature hysteresis (4) 20 °C 1. VCC UVLO is referred to VCC - GND. 2. VBO = VBOOT - VOUT. 3. RBD(on) is tested in the following way: RBD(on) = [(VCC - VBOOTa) - (VCC - VBOOTb)] / [Ia - Ib] Where: Ia is BOOT pin current when VBOOT = VBOOTa; Ib is BOOT pin current when VBOOT = VBOOTb 4. Range estimated by characterization, not tested in production. 5. Tested on wafer. 4.2 GaN power transistor Table 6. GaN power transistor electrical characteristics (VGS = 6 V; TJ = 25°C, unless otherwise specified. ) Symbol Parameter Test condition Min Typ Max Unit GaN on/off states V(BR)DS Drain-source breakdown voltage IDSS < 18 µA(1) VGS = 0 V 650 V MASTERGAN1 GaN power transistor DS13417 - Rev 3 page 8/27 |
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