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MASTERGAN1 数据表(PDF) 15 Page - STMicroelectronics |
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MASTERGAN1 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 27 page ![]() 6 Functional description 6.1 Logic inputs The MASTERGAN1 features a half-bridge gate driver with three logic inputs to control the internal high-side and low-side GaN transistors. The devices are controlled through the following logic inputs: • SD/OD: Shutdown input, active low; • LIN: low-side driver inputs, active high; • HIN: high-side driver inputs, active high. Table 9. Inputs truth table (applicable when device is not in UVLO) Input pins GaN transistors status SD/OD LIN HIN LS HS L X(1) X(1) OFF OFF H L L OFF OFF H L H OFF ON H H L ON OFF H H(2) H(2) OFF OFF 1. X: Don’t care 2. Interlocking The logic inputs have internal pull-down resistors. The purpose of these resistors is to set a proper logic level in case, for example, there is an interruption in the logic lines or the controller outputs are in tri-state conditions. If logic inputs are left floating, the gate driver outputs are set to low level and the correspondent GaN transistors are turned off. The internal logic is able to transfer the control signal pulse longer than TIN_MIN = 120 ns and introduces a very short propagation delay to output. 6.2 Bootstrap structure A bootstrap circuitry is typically used to supply the high-voltage section. MASTERGAN1 integrates this structure, realized by a patented integrated high-voltage DMOS, to reduce the external components. The Boostrap integrated circuit is connected to VCC pin and is driven synchronously with the low-side driver. The use of an external bootstrap diode in parallel to the integrated structure is possible, in particular if the operating frequency is approximately higher than 500 kHz. 6.3 VCC supply pins and UVLO function The VCC pin supplies current to the logic circuit, level-shifters in the low-side section and the integrated bootstrap diode. The PVCC pin supplies low-side output buffer. During output commutations the average current used to provide gate charge to the high-side and low-side GaN transistors flows through this pin. The PVCC pin can be connected either to the same supply voltage of the VCC pin or to a separated voltage source. In case the same voltage source is used, it is suggested to connect VCC and PVCC pins by means of a small decoupling resistance. The use of dedicated bypass ceramic capacitors located as close as possible to each supply pin is highly recommended. MASTERGAN1 Functional description DS13417 - Rev 3 page 15/27 |
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