CC2550-RTY1 datasheet(30/55 Pages) TI

30 / 55 page

CC2550

PRELIMINARY Data Sheet (Rev.1.2)

SWRS039A

Page 30 of 54

Component

CL= 10pF

CL=13pF

CL=16pF

C51

15 pF

22 pF

27 pF

C71

15 pF

22 pF

27 pF

Table 21: Crystal oscillator component values

22.1

Reference Signal

The chip can alternatively be operated with a

reference signal from 26 to 27 MHz instead of

a crystal. This input clock can either be a full-

swing digital signal (0 V to VDD) or a sine

wave of maximum 1 V peak-peak amplitude.

The reference signal must be connected to the

XOSC_Q1 input. The sine wave must be

connected to XOSC_Q1 using a serial

capacitor. The XOSC_Q2 line must be left un-

connected. C51 and C71 can be omitted when

using a reference signal

External RF Match

The balanced RF output of

CC2550 is designed

for a simple, low-cost matching and balun

network on the printed circuit board. A few

passive external components ensure proper

matching.

Although

CC2550 has a balanced RF output,

the chip can be connected to a single-ended

antenna with few external low cost capacitors

and inductors.

The

passive

matching/filtering

network

connected to

CC2550 should have the following

differential impedance as seen from the RF-

port (RF_P and RF_N) towards the antenna:

Zout = 80 + j74 Ω

To ensure optimal matching of the

CC2550

differential output it is highly recommended to

follow the CC2550EM reference designs as

closely as possible. Gerber files for the

reference designs are available for download

from the TI and Chipcon websites.

General Purpose / Test Output Control Pins

The two digital output pins GDO0 and GDO1 are

general control pins. Their functions are

programmed by IOCFG0.GDO0_CFG

and

IOCFG1.GDO1_CFG

respectively. Table 22

shows the different signals that can be

monitored on the GDO pins. These signals can

be used as an interrupt to the MCU. GDO1 is

the same pin as the SO pin on the SPI

interface, thus the output programmed on this

pin will only be valid when CSn is high. The

default value for GDO1 is 3-stated, which is

useful when the SPI interface is shared with

other devices.

The default value for GDO0 is a 135-141 kHz

clock output (XOSC frequency divided by 192).

Since the XOSC is turned on at power-on-

reset, this can be used to clock the MCU in

systems with only one crystal. When the MCU

is up and running, it can change the clock

frequency by writing to IOCFG0.GDO0_CFG.

An on-chip analog temperature sensor is

enabled by writing the value 128 (0x80h) to the

IOCFG0.GDO0_CFG

the

GDO0

then

proportional

temperature. See Section 4.5 on page 7 for

temperature sensor specifications.

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