CC2550-RTY1 datasheet(13/55 Pages) TI

13 / 55 page

CC2550

PRELIMINARY Data Sheet (Rev.1.2)

SWRS039A

Page 13 of 54

Configuration Software

CC2550 can be configured using the SmartRF®

Studio software, available for download from

http://www.ti.com.

The

SmartRF®

Studio

software is highly recommended for obtaining

optimum register settings, and for evaluating

performance and functionality. A screenshot of

the SmartRF® Studio user interface for

CC2550

is shown in Figure 5.

Figure 5: SmartRF

® Studio user interface

4-wire Serial Configuration and Data Interface

CC2550 is configured via a simple 4-wire SPI-

compatible interface (SI, SO, SCLK and CSn)

where

CC2550 is the slave. This interface is

also used to read and write buffered data. All

address and data transfer on the SPI interface

is done most significant bit first.

All transactions on the SPI interface start with

a header byte containing a read/write bit, a

burst access bit and a 6-bit address.

During address and data transfer, the CSn pin

(Chip Select, active low) must be kept low. If

CSn

goes high during the access, the transfer

will be cancelled. The timing for the address

and data transfer on the SPI interface is shown

in Figure 6 with reference to Table 14.

When CSn goes low, the MCU must wait until

the

CC2550 SO pin goes low before starting to

transfer the header byte. This indicates that

the voltage regulator has stabilized and the

crystal is running. Unless the chip is in the

SLEEP or XOFF states or an SRES command

strobe is issued, the SO pin will always go low

immediately after taking CSn low.

Figure 7 gives a brief overview of different

CC2550-RTY1 数据表(PDF) 13 Page - Texas Instruments

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