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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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AT83C5136-RDTUL 数据表(PDF) 28 Page - ATMEL Corporation |
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AT83C5136-RDTUL 数据表(HTML) 28 Page - ATMEL Corporation |
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28 / 171 page  28 AT83C5134/35/36 7683B–USB–03/07 AT89C5131 ROM ROM Structure The AT89C5131 ROM memory is divided in two different arrays: • the code array: 16-32 Kbytes. • the configuration byte:1 byte. Hardware Configuration Byte The configuration byte sets the starting microcontroller options and the security levels. The starting default options are X1 mode, Oscillator A. HSB = xxxx xx11b Table 33. Hardware Security Byte (HSB) HSB (S:EFh) Power configuration Register 7 6 5 4 3 2 1 0 - - OSCON1 OSCON0 - - LB1 LB0 Bit Number Bit Mnemonic Description 7 - Reserved 6 - Reserved 5-4 OSCON1-0 Oscillator Control Bits These two bits are used to control the oscillator in order to reduce consumption. OSCON1 OSCON0 Description 1 1 The oscillator is configured to run from 0 to 32 MHz 1 0 The oscillator is configured to run from 0 to 16 MHz 0 1 The oscillator is configured to run from 0 to 8 MHz 0 0 This configuration shouldn’t be set 3 - Reserved 2 - Reserved 1-0 LB1-0 User Program Lock Bits See Table 34 on page 29 |
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