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IA88C00-PDW48C-R 数据表(PDF) 14 Page - InnovASIC, Inc |
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IA88C00-PDW48C-R 数据表(HTML) 14 Page - InnovASIC, Inc |
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14 / 80 page  IA88C00 Data Sheet Microcontroller As of Production Version -01 Copyright © 2005 ENG 21 0 050519-00 www.Innovasic Innovasic.com Innovasic Semiconductor Page 14 of 80 1.888.824.4184 XTAL1, XTAL2 (Crystal oscillator input) Crystal inputs for the internal oscillator. All port pins are configured as inputs (high impedance) during RESET, except for Port 1 and Port 0. Port 1 is configured as a multiplexed address/ data bus. Port 0 pins P00-P04 are configured as address out. And pins P05-P07 are configured as inputs. Registers The IA88C00 supports a 256-byte register address space. Addresses 00H-BFH contain two sets of registers. Set one contains control registers that are only accessible by register direct commands. Set two contains data registers that are only available via register indirect, indexed, stack and DMA commands, Note that address space E0H to FFH in Set one is further divided into two banks. The state of bank select bit in the Flag register determines which bank is accessed. The register space is shown in Figure 7. |
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