MPC8541ECVTALF datasheet(77/84 Pages) FREESCALE

77 / 84 page

MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4

Freescale Semiconductor

System Design Information

When data is held high, SW1 is closed (SW2 is open) and RP is trimmed until the voltage at the pad equals

OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to each

other in value. Then, Z0 = (RP + RN)/2.

Figure 49. Driver Impedance Measurement

The value of this resistance and the strength of the driver’s current source can be found by making two

measurements. First, the output voltage is measured while driving logic 1 without an external differential

termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured

while driving logic 1 with an external precision differential termination resistor of value Rterm. The

measured voltage is V2 = 1/(1/R1 +1/R2)) × Isource. Solving for the output impedance gives Rsource = Rterm

× (V

1/V2 – 1). The drive current is then Isource =V1/Rsource.

Table 50 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD,

nominal OVDD, 105°C.

Table 50. Impedance Characteristics

Impedance

Local Bus, Ethernet,

DUART, Control,

Configuration, Power

Management

PCI

DDR DRAM

Symbol

Unit

43 Target

25 Target

20 Target

43 Target

25 Target

20 Target

Differential

ZDIFF

Note: Nominal supply voltages. See Table 1, Tj = 105°C.

OVDD

OGND

Pad

Data

SW1

SW2

MPC8541ECVTALF 数据表(PDF) 77 Page - Freescale Semiconductor, Inc

MPC8541ECVTALF 数据表(HTML) 77 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

数据表下载