| 数据搜索系统,热门电子元器件搜索 |
|
TUSB564 数据表(PDF) 41 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TUSB564 数据表(HTML) 41 Page - Texas Instruments |
|
41 / 52 page ![]() Table 9-3. DisplayPort Control/Status Registers (0x10) (continued) Bit Field Type Reset Description 3:0 DP3EQ_SEL R/W/U 0000 Field selects EQ level for DP lane 3. When EQ_OVERRIDE = 1’b0, this field reflects the sampled state of DPEQ[1:0] pins. When EQ_OVERRIDE = 1’b1, software can change the EQ setting for DP lane 3 based on value written to this field. www.ti.com TUSB564-Q1 SLLSFO9A – MAY 2024 – REVISED SEPTEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: TUSB564-Q1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |