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数据搜索系统，热门电子元器件搜索 |
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ST7LITEUSX 数据表(PDF) 10 Page - STMicroelectronics |
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ST7LITEUSX 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 108 page  ST7LITEUSx 10/108 Legend: x=undefined, R/W=read/write Notes: 1. The contents of the I/O port DR registers are readable only in output configuration. In input configura- tion, the values of the I/O pins are returned instead of the DR register contents. 2. The bits associated with unavailable pins must always keep their reset value. 3. For a description of the DM registers, see the ST7 ICC Protocol Reference Manual. 0047h 0048h MuxIO- reset MUXCR0 MUXCR1 Mux IO-Reset Control Register 0 Mux IO-Reset Control Register 1 00h 00h R/W R/W 0049h 004Ah AWU AWUPR AWUCSR AWU Prescaler Register AWU Control/Status Register FFh 00h R/W R/W 004Bh 004Ch 004Dh 004Eh 004Fh 0050h DM 3) DMCR DMSR DMBK1H DMBK1L DMBK2H DMBK2L DM Control Register DM Status Register DM Breakpoint Register 1 High DM Breakpoint Register 1 Low DM Breakpoint Register 2 High DM Breakpoint Register 2 Low 00h 00h 00h 00h 00h 00h R/W R/W R/W R/W R/W R/W 0051h to 007Fh Reserved area (47 bytes) Address Block Register Label Register Name Reset Status Remarks 1 |
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