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VLSI
Solution
y
VS1103b
VS1103B
8. VS1103B REGISTERS
8.9 A/D Modulator Registers
Interrupt registers, prefix AD
Reg
Type
Reset
Abbrev[bits]
Description
0xC01E
rw
0
DIV
A/D Modulator divider.
0xC01F
rw
0
DATA
A/D Modulator data.
AD DIV bits
Name
Bits
Description
ADM POWERDOWN
15
1 in powerdown.
ADM DIVIDER
14:0
Divider.
ADM DIVIDER controls the AD converter’s sampling frequency. To gather one sample, 128 × n clock
cycles are used (n is value of AD DIV). The lowest usable value is 4, which gives a 48 kHz sample rate
when CLKI is 24.576 MHz. When ADM POWERDOWN is 1, the A/D converter is turned off.
AD DATA contains the latest decoded A/D value.
Version 1.01, 2007-09-03
49
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