CC2550-RTY1 datasheet(14/62 Pages) TI2

14 / 62 page

CC2550

SWRS039B

Page 14 of 58

Configuration Software

CC2550 can be configured using the SmartRF®

Studio software ([4]). The SmartRF® Studio

software is highly recommended for obtaining

optimum register settings, and for evaluating

performance and functionality. A screenshot of

the SmartRF® Studio user interface for

CC2550

is shown in Figure 5.

After chip reset, all the registers have default

values as shown in the tables in Section 28.

The optimum register setting might differ from

the default value. After a reset all registers that

shall be different from the default value

therefore needs to be programmed through the

SPI interface.

Figure 5: SmartRF

® Studio [4] User Interface

4-wire Serial Configuration and Data Interface

CC2550 is configured via a simple 4-wire SPI-

compatible interface (SI, SO, SCLK and CSn)

where

CC2550 is the slave. This interface is

also used to write buffered data. All transfer on

the SPI interface are done most significant bit

first.

All transactions on the SPI interface start with

a header byte containing a R/W bit, a burst

access bit (B), and a 6-bit address (A5 – A0).

The CSn pin must be kept low during transfers

on the SPI bus. If CSn goes high during the

transfer of a header byte or during read/write

from/to a register, the transfer will be

cancelled. The timing for the address and data

transfer on the SPI interface is shown in Figure

6 with reference to Table 14.

When CSn is pulled low, the MCU must wait

until

CC2500 SO pin goes low before starting to

transfer the header byte. This indicates that

the crystal is running. Unless the chip was in

the SLEEP or XOFF states, the SO pin will

always go low immediately after taking CSn

low.

CC2550-RTY1 数据表(PDF) 14 Page - Texas Instruments

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