CC2550-RTY1 datasheet(36/62 Pages) TI2

36 / 62 page

CC2550

SWRS039B

Page 36 of 58

FSCAL3

, FSCAL2 and FSCAL1 register values

in MCU memory. Between each frequency

hop, the calibration process can then be

replaced by writing the FSCAL3, FSCAL2 and

FSCAL1

next RF frequency. The PLL turn on time is

approximately

90 µs. The blanking interval

between

each

frequency

hop

then

approximately 90 us. The VCO current

calibration result is available in FSCAL2 and is

not dependent on the RF frequency. Neither is

the charge pump current calibration result

available in FSCAL3. The same value can

therefore be used for all frequencies.

3) Run calibration on a single frequency at

startup. Next write 0 to FSCAL3[5:4] to

disable the charge pump calibration. After

writing to FSCAL3[5:4] strobe STX with

MCSM0.FS_AUTOCAL

for

each

new

frequency hop. That is, VCO current and VCO

capacitance calibration is done but not charge

pump current calibration. When charge pump

current calibration is disabled the calibration

time is reduced from approximately 720 µs to

approximately 150 µs. The blanking interval

between

each

frequency

hop

then

approximately 240 us

There is a trade off between blanking time and

memory space needed for storing calibration

data in non-volatile memory. Solution 2) above

gives the shortest blanking interval, but

requires more memory space to store

calibration

values.

Solution

gives

approximately 570 µs smaller blanking interval

than solution 1).

27.3

Wideband

Modulation

not

Using

Spread Spectrum

Digital modulation systems under FCC part

15.247 includes 2-FSK and GFSK modulation.

A maximum peak output power of 1 W (+30

dBm) is allowed if the 6 dB bandwidth of the

modulated signal exceeds 500 kHz. In

addition, the peak power spectral density

conducted to the antenna shall not be greater

than +8 dBm in any 3 kHz band.

Operating at high data rates and high

frequency separation, the

CC2550 is suited for

systems targeting compliance with digital

modulation systems as defined by FCC part

15.247. An external power amplifier is needed

to increase the output above +1 dBm.

27.4

Data Burst Transmissions

The high maximum data rate of

CC2550 opens

up for burst transmissions. A low average data

rate link (e.g. 10 kBaud), can be realized using

a higher over-the-air data rate. Buffering the

data and transmitting in bursts at high data

rate (e.g. 500 kBaud) will reduce the time in

TX mode, and hence also reduce the average

current consumption significantly. Reducing

the time in TX mode will reduce the likelihood

of collisions with other systems, e.g. WLAN.

27.5

Continuous Transmissions

In data streaming applications the

CC2550

opens up for continuous transmissions at 500

kBaud effective data rate. As the modulation is

done with a closed loop PLL, there is no

limitation in the length of a transmission (open

loop modulation used in some transceivers

often prevents this kind of continuous data

streaming and reduces the effective data rate.)

27.6

Spectrum Efficient Modulation

CC2500 also has the possibility to use

Gaussian

shaped

2-FSK

(GFSK).

This

spectrum-shaping feature improves adjacent

channel

power

(ACP)

and

occupied

bandwidth. In ‘true’ 2-FSK systems with abrupt

frequency shifting, the spectrum is inherently

broad. By making the frequency shift ‘softer’,

the spectrum can be made significantly

narrower. Thus, higher data rates can be

transmitted in the same bandwidth using

GFSK.

27.7

Low Cost Systems

A differential antenna will eliminate the need

for a balun, and the DC biasing can be

achieved in the antenna topology, see Figure

3. The CC25XX Folded Dipole reference

design [7] contains schematics and layout files

for a CC2500EM with a folded dipole PCB

antenna. This design note can also be used

with the

CC2550. Please see DN004 [8] for

more details on this design.

A HC-49 type SMD crystal is used in the

CC2550EM reference design. Note that the

crystal package strongly influences the price.

In a size constrained PCB design a smaller,

but more expensive, crystal may be used.

27.8

Battery Operated Systems

In low power applications, the SLEEP state

should be used when the

CC2550 is not active.

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