CC2550-RTY1 datasheet(24/62 Pages) TI2

24 / 62 page

CC2550

SWRS039B

Page 24 of 58

sensitivity from a higher receiver bandwidth

will be counteracting factors.

15.2

Interleaving

Data received through radio channels will often

experience burst errors due to interference

and time-varying signal strengths. In order to

increase the robustness to errors spanning

multiple bits, interleaving is used when FEC is

enabled. After de-interleaving on the receiver

side, a continuous span of errors in the

received stream will become single errors

spread apart.

CC2550 employs matrix interleaving, which is

illustrated

Figure

12.

The

on-chip

interleaving buffer is a 4 x 4 matrix. The data

bits from the rate ½ convolutional coder are

written into the rows of the matrix, whereas the

bit sequence to be transmitted is read from the

columns of the matrix. Conversely, in a

CC2500

[9] receiver, the received symbols are written

into the rows of the matrix, whereas the data

passed onto the convolutional decoder is read

from the columns of the matrix.

When FEC and interleaving is used at least

one

extra

byte

required

for

trellis

termination. In addition, the amount of data

transmitted over the air must be a multiple of

the size of the interleaver buffer (two bytes).

The

packet

control

hardware

therefore

automatically inserts one or two extra bytes at

the end of the packet, so that the total length

of the data to be interleaved is an even

number. Note that these extra bytes are

invisible to the user, as they are removed

before the received packet enters the RX FIFO

in a

CC2500 [9].

When FEC and interleaving is used the

minimum data payload is 2 bytes.

Note that for the

CC2500 [9] transceiver FEC is

only supported in fixed packet length mode

(PKTCTRL0.LENGTH_CONFIG=0).

Packet

Engine

FEC

Encoder

Modulator

Interleaver

Write buffer

Interleaver

Read buffer

Figure 12: General Principle of Matrix Interleaving

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