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ASFC 数据表(PDF) 34 Page - Alliance Semiconductor Corporation |
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ASFC 数据表(HTML) 34 Page - Alliance Semiconductor Corporation |
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34 / 42 page ![]() Table 32: HS400 Capacitance and Resistors Parameter Symbol Min. Type Max. Unit Remark Pull-up resistance for CMD RCMD 4.7 100 kOhm Pull-up resistance for DAT0-7 RDAT 10 100 kOhm Pull-down resistance for Data Strobe RDS 10 100 kOhm Internal pull up resistance DAT1- DAT7 Rint 10 150 kOhm Single Device capacitance CDevice 6 pF 9. eMMC Registers Within the Device interface six registers are defined: OCR, CID, CSD, EXT_CSD, RCA and DSR. These can be accessed only by corresponding commands (see Section 6.10 of JESD84-B51). Table 33: eMMC Registers Name Width (Bytes) Description Implementation CID 16 Device Identification number, an individual number for identification. Mandatory RCA 2 Relative Device Address is the Device system address, dynamically assigned by the host during initialization. Mandatory DSR 2 Driver Stage Register, to configure the Device’s output drivers. Optional, not implemented CSD 16 Device Specific Data, information about the Device operation conditions. Mandatory OCR 4 Operation Conditions Register. Used by a special broadcast command to identify the voltage type of the Device. Mandatory EXT_CSD 512 Extended Device Specific Data. Contains information about the Device capabilities and selected modes. Introduced in standard v4.0 Mandatory The host may reset the device by: Switching the power supply off and back on. The device shall have its own power-on detection circuitry which puts the device into a defined state after the power-on Device. A reset signal By sending a special command 9.1 OCR Register The 32-bit operation conditions register (OCR) stores the VDD voltage profile of the Device and the access mode indication. In addition, this register includes a status information bit. This status bit is set if the Device power up procedure has been finished. The OCR register shall be implemented by all Devices. Table 34: OCR register OCR bit VCCQ voltage window typ. value [6:0] Reserved 000 0000b [7] 1.70 – 1.95V 1b [14:8] 2.0 – 2.6V 000 0000b [23:15] 2.7 – 3.6V 1 1111 1111b [28:24] Reserved 0 0000b [30:29] Access Mode 10b (sector mode, for devices >2GB) [31] Card power up status bit (0=busy; 1=ready)1 Note 1: This bit is set to LOW if the Device has not finished the power up routine. Confidential -34 /42- Rev.1.0 July 2023 32GB/64GB/128GB eMMC |
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