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AM263P4 数据表(PDF) 5 Page - Texas Instruments |
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AM263P4 数据表(HTML) 5 Page - Texas Instruments |
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5 / 168 page  3.1 Functional Block Diagram Figure 3-1 is the functional block diagram for the device. AM263Px Industrial Connectivity Realtime Cores PRU-ICSS Arm® Cortex®-R5F Arm® Cortex®-R5F Connectivity Security Memory Subsystem System Services GPIO 8x MCAN MMC/SD 8x SPI 5x LIN 6x UART 4x I2C 3-port Gb Ethernet Switch (CPSW) w/ IEEE1588 HSM (Secure Boot) PKA Debug MD5 3DES AES Power Manager System Monitor DMA Debug Firewall IPC Secure Boot DCC ECC ESM Timers 3 MB SRAM with ECC TRNG TMU TMU Arm® Cortex®-R5F Arm® Cortex®-R5F TMU TMU Sensing and Actuation 16x ECAP 2x 4-ch SDFM 40x analog Comparators (CMPSS) with DAC Ref 32x EHRPWM 12-bit DAC 3x EQEP 5x 6-ch 12-bit ADC Resolver Subsystem including 2x RDC and 2x 4-ch ADC Flash Subsystem OptiFlash (A) OSPI or QSPI (D) (C) UART ECAP MDIO IEP M4F 128KB TCM 128KB TCM 128KB TCM 128KB TCM (B) (B) (B) (B) Cores Memory Peripherals SHA PRU0 PRU1 Figure 3-1. Functional Block Diagram A. AM263Px is available with 4 and 2 core options. Refer to the Device Comparison table for more peripheral specific details. B. Each R5F cluster supports 256KB of Tightly-Coupled Memory (TCM). When configured as Single-Core or Lockstep operating mode, individual cores can utilize all 256KB. While in Dual-Core mode, each core may only utilize its designated half (128KB TCM). C. The Resolver subsystem is available for the ZCZ_S and ZCZ_F packages only. www.ti.com AM263P4, AM263P2, AM263P4-Q1, AM263P2-Q1 SPRSP81D – OCTOBER 2023 – REVISED MAY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: AM263P4 AM263P2 AM263P4-Q1 AM263P2-Q1 |
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