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AM263P4 数据表(PDF) 84 Page - Texas Instruments |
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AM263P4 数据表(HTML) 84 Page - Texas Instruments |
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84 / 168 page  6.8.5 Digital-to-Analog Converter (DAC) over operating junction temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Power-up time 1 µs DAC_VREF 1.71 1.8 1.89 V Voltage output range 0.3 VDDA33(1) – 0.3 V Trimmed offset error Offset is checked at Midpoint (code 2048) –10 10 mV Gain error DAC_VREF = 1.8V –2.5 2.5 % of FSR DNL Endpoint corrected –1 1 LSB INL Endpoint corrected –20 20 LSB Settling time Settling to 2 LSBs (~1.6mV) after 0.3V-to-3V transition 2 µs Resolution 12 bits Capacitive load Output drive capability 100 pF Resistive load Output drive capability 5 kΩ DAC_VREF loading DAC_VREF 64 kΩ Output noise (100Hz-100KHz) Integrated noise from 100Hz to 100kHz 1 mVrms SNR @ 1KHz 2MHz DACVALA update rate, 200kHz output filter 60 dB Power supply (VDDA33) 3.13 3.3 3.46 V Power supply (VDDA18) 1.71 1.8 1.89 V Power Consumption (VDDA33) 850 µA Power Consumption (VDDA18) 35 µA (1) VDDA33 is the voltage on the corresponding power-supply pin(s) on the IC. 6.8.6 Power Management Unit (PMU) over operating junction temperature range (unless otherwise noted) GROUP PARAMETER MIN TYP MAX UNIT PMU Power supply (VDDA33) 3.1 3.3 3.46 V Bandgap VREF trimmed 0.886 0.9 0.914 V 1.8V LDO DC accuracy 1.764 1.8 1.836 V Transient load regulation 1.71 1.8 1.89 V DC Load regulation 5 mV Load current 0 60 mA Power up time 800 uS Inrush current 150 mA External decoupling capacitance –20% 4.7 20% uF ADC Reference Load Regulation ±1 mV DC accuracy 1.764 1.8 1.836 V Power up time 800 uS Inrush current 80 mA External decoupling capacitance –20% 4.7 20% uF AM263P4, AM263P2, AM263P4-Q1, AM263P2-Q1 SPRSP81D – OCTOBER 2023 – REVISED MAY 2025 www.ti.com 84 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: AM263P4 AM263P2 AM263P4-Q1 AM263P2-Q1 |
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