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AM263P4 数据表(PDF) 81 Page - Texas Instruments |
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AM263P4 数据表(HTML) 81 Page - Texas Instruments |
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81 / 168 page  6.8.2.2 Resolver Analog-to-Digital Converter (ADC_R) over operating junction temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VREFHI 1.71 1.8 1.89 V Input Conversion Range (Vin+, Vin-) Must be < VDDA33 0 33/18 × VREFHI V Power-up time 500 µs Gain error –5 ±3 5 LSBs Offset error –4 ±2 4 LSBs Channel-to-channel gain error ±4 LSBs Channel-to-channel offset error ±2 LSBs ADC-to-ADC gain error Same reference group ±4 LSBs ADC-to-ADC offset error Same reference group ±2 LSBs DNL Controlled environment to minimize input noise –1 ±0.5 1 LSBs INL Controlled environment to minimize input noise –2 ±1.0 2 LSBs SNR Controlled environment to minimize input noise 68 dB ENOB (Synchronous Operation) 11 bits ENOB (Asynchronous Operation) 9.7 bits ADC-to-ADC isolation Synchronous operation –10 10 LSBs VREFHI input current 500 µA Conversion time 333 ns Parasitic Input Capacitance (Cp)(1) 7 pF Sample/Hold Resistance (Ron)(1) 1.2 kΩ Sample/Hold Capacitance (Ch)(1) 8 pF Input Leakage –1.2 0.1 1.2 µA Power supply (VDDA33) 3.13 3.3 3.46 V Power supply (VDDA18) 1.71 1.8 1.89 V Power Consumption (VDDA33) 200 µA Power Consumption (VDDA18) 500 µA (1) See ADC Input Model 6.8.2.3 ADC Input Model SW Ron Cp Ch ADC ADCINx VREFLO Figure 6-1. ADC Input Model www.ti.com AM263P4, AM263P2, AM263P4-Q1, AM263P2-Q1 SPRSP81D – OCTOBER 2023 – REVISED MAY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 81 Product Folder Links: AM263P4 AM263P2 AM263P4-Q1 AM263P2-Q1 |
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