| 数据搜索系统,热门电子元器件搜索 |
|
BQ40Z50-R2 数据表(PDF) 18 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
BQ40Z50-R2 数据表(HTML) 18 Page - Texas Instruments |
|
18 / 55 page ![]() 7.31 OLD, SCC, SCD1, SCD2 Current Protection Thresholds (continued) Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ΔVSCD2 SCD2 detection threshold voltage program step VSCD2 = VSRP – VSRN, AFE PROTECTION CONTROL[RSNS] = 1 –22.2 mV VSCD2 = VSRP – VSRN, AFE PROTECTION CONTROL[RSNS] = 0 –11.1 VOFFSET OLD, SCC, and SCDx offset error Post-trim –2.5 2.5 mV VSCALE OLD, SCC, and SCDx scale error No trim –10% 10% — Post-trim –5% 5% 7.32 Timing Requirements: OLD, SCC, SCD1, SCD2 Current Protection Timing Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) MIN NOM MAX UNIT tOLD OLD detection delay time 1 31 ms ΔtOLD OLD detection delay time program step 2 ms tSCC SCC detection delay time 0 915 µs ΔtSCC SCC detection delay time program step 61 µs tSCD1 SCD1 detection delay time AFE PROTECTION CONTROL[SCDDx2] = 0 0 915 µs AFE PROTECTION CONTROL[SCDDx2] = 1 0 1850 ΔtSCD1 SCD1 detection delay time program step AFE PROTECTION CONTROL[SCDDx2] = 0 61 µs AFE PROTECTION CONTROL[SCDDx2] = 1 121 tSCD2 SCD2 detection delay time AFE PROTECTION CONTROL[SCDDx2] = 0 0 458 µs AFE PROTECTION CONTROL[SCDDx2] = 1 0 915 ΔtSCD2 SCD2 detection delay time program step AFE PROTECTION CONTROL[SCDDx2] = 0 30.5 µs AFE PROTECTION CONTROL[SCDDx2] = 1 61 tDETECT Current fault detect time VSRP – VSRN = VT – 3 mV for OLD, SCD1, and SC2, VSRP – VSRN = VT + 3 mV for SCC 160 µs tACC Current fault delay time accuracy Max delay setting –10% 10% 7.33 Timing Requirements: SMBus Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) MIN NOM MAX UNIT fSMB SMBus operating frequency SLAVE mode, SMBC 50% duty cycle 10 100 kHz fMAS SMBus master clock frequency MASTER mode, no clock low slave extend 51.2 kHz tBUF Bus free time between start and stop 4.7 µs BQ40Z50-R2 SLUSCS4C – JUNE 2017 – REVISED APRIL 2021 www.ti.com 18 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ40Z50-R2 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |