BQ40Z50-R2 datasheet(3/55 Pages) TI2

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5 Description (continued)

The BQ40Z50-R2 device supports TURBO Mode 2.0 by providing the available max power and max current to

the host system. The device also supports Battery Trip Point to send a BTP interrupt signal to the host system at

the preset state of charge thresholds.

The BQ40Z50-R2 provides software-based 1st- and 2nd-level safety protection against overvoltage,

undervoltage, overcurrent, short-circuit current, overload, and overtemperature conditions, as well as other pack-

and cell-related faults.

SHA-1 authentication, with secure memory for authentication keys, enables identification of genuine battery

packs.

The compact 32-lead QFN package minimizes solution cost and size for smart batteries while providing

maximum functionality and safety for battery gauging applications.

6 Pin Configuration and Functions

PBI

PTCEN

VC4

PTC

VC3

LEDCNTLC

VC2

LEDCNTLB

VC1

LEDCNTLA

SRN

SMBC

SMBD

SRP

DISP

Not to scale

Thermal

Pad

Table 6-1. Pin Functions

PIN NUMBER

PIN NAME

TYPE

DESCRIPTION

PBI

P(1)

Power supply backup input pin. Connect to the 2.2-µF capacitor to VSS.

VC4

Sense voltage input pin for the most positive cell, and balance current input

for the most positive cell. Should be connected to the positive terminal of the

fourth cell from the bottom of the stack with a 100-Ω series resistor and a

0.1-μF capacitor to VC3. If not used, connect to VC3.

VC3

Sense voltage input pin for the third-most positive cell, balance current input

for the third-most positive cell, and return balance current for the most

positive cell. Should be connected to the positive terminal of the third cell from

the bottom of the stack with a 100-Ω series resistor and a 0.1-μF capacitor to

VC2. If not used, connect to VC2.

VC2

Sense voltage input pin for the second-most positive cell, balance current

input for the second-most positive cell, and return balance current for the

third-most positive cell. Should be connected to the positive terminal of the

second cell from the bottom of the stack with a 100-Ω series resistor and a

0.1-μF capacitor to VC1. If not used, connect to VC1.

VC1

Sense voltage input pin for the least positive cell, balance current input for

the least positive cell, and return balance current for the second-most positive

cell. Should be connected to the positive terminal of the first cell from the

bottom of the stack with a 100-Ω series resistor and a 0.1-μF capacitor to

VSS.

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BQ40Z50-R2

SLUSCS4C – JUNE 2017 – REVISED APRIL 2021

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