ADE7166 datasheet(86/144 Pages) AD

86 / 144 page

ADE7566/ADE7569/ADE7166/ADE7169

Rev. A | Page 86 of 144

Mnemonic

Description

Bytes

Cycles

JNC rel

Jump on Carry Equal to 0.

JZ rel

Jump on Accumulator = 0.

JNZ rel

Jump on Accumulator Not Equal to 0.

DJNZ Rn,rel

Decrement Register, JNZ Relative.

LJMP

Long Jump Unconditional.

LCALL addr16

Long Jump to Subroutine.

JB bit,rel

Jump on Direct Bit = 1.

JNB bit,rel

Jump on Direct Bit = 0.

JBC bit,rel

Jump on Direct Bit = 1 and Clear.

CJNE A,dir,rel

Compare A, Direct JNE Relative.

CJNE A,#data,rel

Compare A, Immediate JNE Relative.

CJNE Rn,#data,rel

Compare Register, Immediate JNE Relative.

CJNE @Ri,#data,rel

Compare Indirect, Immediate JNE Relative.

DJNZ dir,rel

Decrement Direct Byte, JNZ Relative.

MISCELLANEOUS

NOP

No Operation.

READ-MODIFY-WRITE INSTRUCTIONS

Some 8052 instructions read the latch and others read the pin.

The state of the pin is read for instructions that input a port bit.

Instructions that read the latch rather than the pins are the ones

that read a value, possibly change it, and rewrite it to the latch.

Because these instructions involve modifying the port, it is

assumed that the pins being modified are outputs, so the output

state of the pin is read from the latch. This prevents a possible

misinterpretation of the voltage level of a pin. For example, if a

port pin is used to drive the base of a transistor, a 1 is written to

the bit to turn on the transistor. If the CPU reads the same port

bit at the pin rather than the latch, it reads the base voltage of

the transistor and interprets it as Logic 0. Reading the latch

rather than the pin returns the correct value of 1.

The instructions that read the latch rather than the pins are

called read-modify-write instructions and are listed in Table 65.

When the destination operand is a port or a port bit, these

instructions read the latch rather than the pin.

Table 65. Read-Modify-Write Instructions

Instruction

Example

Description

ANL

ANL P0,A

Logical AND.

ORL

ORL P1,A

Logical OR.

XRL

XRL P2,A

Logical EX-OR.

JBC

JBC P1.1,LABEL

Jump if Bit = 1 and Clear Bit.

CPL

CPL P2.0

Complement Bit.

INC

INC P2

Increment.

DEC

DEC P2

Decrement.

DJNZ

DJNZ P0,LABEL

Decrement and Jump if Not Zero.

MOV PX.Y,C1

MOV P0.0,C

Move Carry to Bit Y of Port X.

CLR PX.Y1

CLR P0.0

Clear Bit Y of Port X.

SETB PX.Y1

SETB P0.0

Set Bit Y of Port X.

1 These instructions read the port byte (all 8 bits), modify the addressed bit,

and write the new byte back to the latch.

INSTRUCTIONS THAT AFFECT FLAGS

Many instructions explicitly modify the carry bit, such as the

MOV C bit and CLR C instructions. Other instructions that

affect status flags are listed in this section.

ADD A, Source

This instruction adds the source to the accumulator. No status

flags are referenced by the instruction.

Affected Status Flags

Set if there is a carry out of Bit 7. Cleared otherwise.

Used to indicate an overflow if the operands are

unsigned.

Set if there is a carry out of Bit 6 or a carry out of

Bit 7, but not if both are set. Used to indicate an

overflow for signed addition. This flag is set if two

positive operands yield a negative result or if two

negative operands yield a positive result.

Set if there is a carry out of Bit 3. Cleared otherwise.

ADDC A, Source

This instruction adds the source and the carry bit to the accu-

mulator. The carry status flag is referenced by the instruction.

Affected Status Flags

Set if there is a carry out of Bit 7. Cleared otherwise.

Used to indicate an overflow if the operands are

unsigned.

Set if there is a carry out of Bit 6 or a carry out of Bit 7,

but not if both are set. Used to indicate an overflow

for signed addition. This flag is set if two positive

operands yield a negative result or if two negative

operands yield a positive result.

Set if there is a carry out of Bit 3. Cleared otherwise.

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