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L6000 数据表(PDF) 7 Page - STMicroelectronics |
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L6000 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 24 page ![]() SYSTEM DESCRIPTION Pulse Detector Section Fast attack/decay modes for rapid AGC recovery. Dual rate charge pump for fast transient recovery. Low Drift AGC hold circuitry supports programma- ble gain, non-AGC operation. Temperature com- pensated, exponential control AGC. Shorted input switch for transient recovery, during Power down & Write to read & Idle mode transitions. Wide Bandwidth, high precision full-wave rectifier. Dual mode pulse qualification circuitry allows either in- dependent positive and negative threshold qualifi- cation to suppress error propagation or hysteresis comparison wich implements alternating polari- ties. Differential qualifier comparator. TTL READ DATA I/O signal output available during servo and idle modes. Timing for shorted inputs and fast decay functions set internally. 0.5 ns max. pulse pairing with sine wave input. Embedded Servo Demodulator Section Dual servo burst (A/B) capture with Position Error Signal Output. Servo AGC mode which holds sum of A and B bursts constant. Provision for on-chip switching of the hysteresis threshold time con- stant. Programmable Filter Section Programmable filter cutoff frequency (fc = 6 to 18 MHz). Programmable pulse slimming equalization (0 to 9 dB Boost at the filter cutoff frequency). Matched path timing normal and differential low- pass outputs. Differential filter input and outputs for noise rejection ±10% cutoff frequency accu- racy. ±2% maximum group delay variation in the passband maintained over the cutoff frequency tuning range ( fc=6 to 18 MHz ). Total harmonic distortion less than 1.5 %. No external filter com- ponents required. Shorted input switch for tran- sient recovery, during Power down & Write to Read & Idle mode transitions. Frequency Synthesizer and Data Separator Section 1% frequency resolution. Data synchronizer and 1.7 RLL ENDEC. Fast acquisition phase lock loop with zero phase restart both to data and synthe- sizer. Fully integrated data separator. No external delay lines or active devices required. No external active PLL components required. Active window centering symmetry control via serial port. Win- dow shift control ±30%. Includes delayed read data and VCO clock monitor tests points. Pro- grammable write precompensation. Hard and soft sector operation. THERMAL DATA Symbol Parameter Value Unit Rth j-amb Thermal Resistance Junction-Ambient 100 °C/W Rth j-case Thermal Resistance Junction-Case 20 °C/W RECOMMENDED OPERATING CONDITIONS Vccn Supply Voltage 4.3 to 5.5 V Tamb Operating Ambient temperature 0 to 70 °C Tj Junction Temperature 25 to 125 °C L6000 7/24 |
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