| 数据搜索系统,热门电子元器件搜索 |
|
L6000 数据表(PDF) 10 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L6000 数据表(HTML) 10 Page - STMicroelectronics |
|
10 / 24 page ![]() PULSE DETECTOR AND SERVO DEMODULATOR CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit Data Comparator Section (The input signals are AC coupled to DATA PATH and DATA PATH) DATA PATH/ DATA PATH Signal Range – 1 1.5 Vpp Differential Input resistance 8 – 14 K Ω Differential Input capacitance – – 5 pF Comparator Offset Voltage (*) –– ±4mV Threshold Voltage Hysteresis (*) – 20Kth – % Kth Threshold Voltage Gain 0.3 ≤ ( LEVEL-LEVEL REF V) ≤ 0.75, Kth = VTHDAC*0.651/127, 38 < VTHDAC < 125, Vthresh = KTH*(LEVEL-LEVEL REF V), also, %hyst = VTHDAC*97.6%/127 Kth-9% Kth Kth+9% V/V Minimum Threshold Voltage LEVEL-LEVEL REF V ≤ 0.1V, Vthmin = VTHDAC*0.099/127 (*) – Vthmin – V Clocking Section (The input signals are AC coupled to CLOCK PATH and CLOCK PATH) CLOCK PATH-CLOCK PATH Signal Range – – 1.5 Vpp Comparator Offset Voltage (*) –– ±4mV Differential Input Resistance 8 – 14 K Ω Differential Input Capacitance – – 5 pF Pulse Paring Vs = 1Vpp, F = 4MHz – – 0.5 ns Prpagation Delay to READ DATA I/O Vs = 20mVpp sq. wave 4 12 20 ns Servo Section SERVO REF V Voltage Range 2.15V ≤ SERVO REF V ≤ 2.75V 2.15 2.50 2.75 V SERVO REF V Input Bias Current –1 0.2 1 µA Voltage Gain, SERVO REF V to POSITION OUT |HOLD CAP A-HOLD CAP B| ≤ 0.4V 0.98 1.0 1.02 v/v POSIT ION OUT Pin Offset Voltage HOLD CAP A-HOLD CAP B = 0V, SERVO REF V = 2.50V –0 ±12 mV POSITI ON OUT Pin High HOLD CAP A-HOLD CAP B = +1.8V Vcc PULSE – Vcc PULSE V Level Output Voltage SERVO REF V = 2.50V, Isource = 0.5mA DET- 1.5 DET- 0.3 POSITI ON OUT Pin Low HOLD CAP A-HOLD CAP B = -1.8V GND PULSE – GND PULSE V Level Output Voltage SERVO REF V = 2.50V Isink = 0.5mA DET +0.3 DET +1.5 RO POSITI ON OUT Pin Output Resistance VNG+1.5V ≤ POSITION OUT ≤ VPG-1.5V –– 50 Ω POSIT ION OUT GAIN (POSITION OUT-SERVO REF V)/Vpp 1.8 V/Vpp (2) HOLD CAP A/B Charge Current Absolute Value 4 – – mA (*) Guaranted by design. (2) Test limits under evaluation. L6000 10/24 |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |