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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ST7FLCD1 数据表(PDF) 90 Page - STMicroelectronics |
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ST7FLCD1 数据表(HTML) 90 Page - STMicroelectronics |
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90 / 95 page  Electrical Characteristics ST7FLCD1 90/95 17.5 Power On/Off Electrical Specifications 17.6 8-bit Analog-to-Digital Converter Symbol Parameter Conditions Min. Typ. Max. Unit VTRH Power ON/OFF Reset Trigger VDD rising edge VDD Variation 50mV/mS 3.8 4 4.2 V VTRL Power ON/OFF Reset Trigger VDD falling edge VDD Variation 50mV/mS 3.75 4 4.2 V VTRM VDD minimum for Power ON/OFF Reset active VDD Variation 50mV/mS TBD V Symbol Parameter Conditions Min. Typ. Max. Unit fADC Analog control frequency VDD = 5 V 2 MHz |TUE| Total unadjusted error fCPU = 8 MHz, fADC = 2MHz VDD = 5 V 01 2 LSB OE Offset error -2 1 2 GE Gain error -2 1 2 |DLE| Differential linearity error 0 0.5 1 |ILE| Integral linearity error 0 1 2 VAIN Conversion range voltage VSS VDD V IADC A/D conversion supply current fCPU = 8 MHz, fADC = 2MHz VDD = 5 V 1mA tSTAB Stabilization time after enable ADC 1 µs tLOAD Sample capacitor loading time 1 4 µs 1/fADC tCONV Conversion time 2 8 µs 1/fADC RAIN External input resistor 15 k Ω RADC Internal input resistor 1.5 k Ω CSAMPLE Sample capacitor 6 pF |
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